LPC MicrocontrollersのトピックRe: IAP flash algorithm gives hard fault on LPC5410x board

IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:31 GMT

Content originally posted in LPCWare by mbilal on Fri Dec 26 02:38:41 MST 2014
I wrote IAP flash algorithm for LPC5410 512K Flash board.
I always get a hard fault on preparing a single scetor or any other IAP command.

Below is my code:

#include <stdio.h>

/* Total number of command. */
#define COMMAND_LENGTH 5
/* Total number of return status. */
#define RESULT_LENGTH 5

#define COMMAND_PREPARE 50
#define COMMAND_PROGRAM 51
#define COMMAND_ERASE 52
#define COMMAND_PAGE_ERASE 59
#define COMMAND_PART_NUMBER 54

/* Define the IAP location entry point. */
#define IAP_LOCATION 0x03000204

/* Setting the function pointer that takes IAP command table and result table pointers. */
typedef void (*iap) (unsigned int *, unsigned int *);

unsigned int lpc5410x_prepare_sector (unsigned int sector)
{
unsigned int command[COMMAND_LENGTH];
unsigned int result[RESULT_LENGTH];
iap iap_entry = (iap) IAP_LOCATION;
command[0] = COMMAND_PREPARE;
command[1] = sector;
command[2] = sector;
(*iap_entry) (command, result);
printf("The result of prepared sector number (%d) is %d", sector, result[0]);
return result[0];
}

static __inline__ unsigned int __attribute__ ((always_inline))
lpc5410x_page_erase (unsigned int sector)
{
unsigned int command[COMMAND_LENGTH];
unsigned int result[RESULT_LENGTH];
iap iap_entry = (iap) IAP_LOCATION;
command[0] = COMMAND_PAGE_ERASE;
command[1] = sector;
command[2] = sector;
iap_entry (command, result);
printf("The result of page erase number (%d) is %d", sector, result[0]);
return result[0];
}

/* Erase sector SECTOR. */

static __inline__ unsigned int __attribute__ ((always_inline))
lpc5410x_erase_sector (unsigned int sector)
{
unsigned int command[COMMAND_LENGTH];
unsigned int result[RESULT_LENGTH];
iap iap_entry = (iap) IAP_LOCATION;
command[0] = COMMAND_ERASE;
command[1] = sector;
command[2] = sector;
iap_entry (command, result);
printf("The result of erase sector number (%d) is %d", sector, result[0]);
return result[0];
}

static __inline__ unsigned int __attribute__ ((always_inline))
lpc5410x_part_number ()
{
unsigned int command[COMMAND_LENGTH];
unsigned int result[RESULT_LENGTH];
iap iap_entry = (iap) IAP_LOCATION;
command[0] = COMMAND_PART_NUMBER;
iap_entry (command, result);
printf("The result of part identification number is %d",result[0]);
return result[0];
}

static __inline__ unsigned int __attribute__ ((always_inline))
lpc5410x_program_sector (unsigned int dest, unsigned int src, unsigned int len)
{
unsigned int command[COMMAND_LENGTH];
unsigned int result[RESULT_LENGTH];
iap iap_entry = (iap) IAP_LOCATION;
command[0] = COMMAND_PROGRAM;
command[1] = dest;
command[2] = src;
command[3] = len;
iap_entry (command, result);
return result[0];
}

int main ()
{
lpc5410x_prepare_sector (1);

// Erase a single sector
lpc5410x_erase_sector(1);
return 0;
}

I also saved top 32 bytes of SRAM space for this and set voltage with Power API command.

I always got Hard fault at line (below) of every command.
iap_entry (command, result);

Is IAP_Location 0x03000204 has been described correct in LPC5410x manual or I'am doing something wrong.
Please help me on this regard.
It will be very appreciated.

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:31 GMT

Content originally posted in LPCWare by DF9DQ on Fri Dec 26 09:14:40 MST 2014
Can you try with this small modification?
#define IAP_LOCATION 0x03000205

Thumb addresses are odd values!

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:32 GMT

Content originally posted in LPCWare by R2D2 on Fri Dec 26 09:47:19 MST 2014

Quote: mbilal
Please help me on this regard.

:quest:

LPCOpen IAP sample

romapi_5410x.h:

/* Pointer to ROM IAP entry functions */
#define IAP_ENTRY_LOCATION        0x03000205

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:33 GMT

Content originally posted in LPCWare by mbilal on Mon Dec 29 08:40:01 MST 2014
Thanks R2D2

After setting the IAP_ENTRY_LOCATION to 0x03000205 works for me.

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:33 GMT

Content originally posted in LPCWare by mbilal on Mon Dec 29 08:45:15 MST 2014
Seeing during IAP command of "Erase Sector" and "Copy RAM to flash", I can set the "CPU Clock Frequency in KHz" but this is not mentioned in User Manual.

I think user Manual should be updated with above mentioned IAP command.

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:34 GMT

Content originally posted in LPCWare by lpcxpresso-support on Mon Dec 29 10:29:52 MST 2014
AFAIK, this parameter is not used for the LPC5410x family and is ignored, which is why it is not mentioned in the User Manual.

However, we will ask a colleague to confirm.

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:34 GMT

Content originally posted in LPCWare by mbilal on Tue Dec 30 07:42:14 MST 2014
I have two LPC5410 512K board.
On both Board I can apply IAP, but sector "0" is not being effected by any IAP command (i.e sector erase and copy ram to flash).
After Erase the whole flash still sector "0" from the begnning is not erased and flashed.
Sector "0" is showing always following fix contents of memory

(gdb) x/100x 0
0x0 <_ftext>:0x02003fe00x030000b10x030002610x03000263
0x10 <_ftext+16>:0x030002650x030002670x030002690xffffffff
0x20 <_ftext+32>:0xffffffff0xffffffff0xffffffff0x0300026b
0x30 <_ftext+48>:0x0300026d0xffffffff0x0300026f0x03000271
0x40 <_ftext+64>:0xffffffff0xffffffff0xffffffff0xffffffff
0x50 <_ftext+80>:0xffffffff0xffffffff0xffffffff0xffffffff
0x60 <_ftext+96>:0xffffffff0xffffffff0xffffffff0xffffffff
0x70 <_ftext+112>:0xffffffff0xffffffff0xffffffff0xffffffff
0x80 <_ftext+128>:0xffffffff0xffffffff0xffffffff0xffffffff
0x90 <_ftext+144>:0xffffffff0xffffffff0xffffffff0xffffffff
0xa0 <_ftext+160>:0xffffffff0xffffffff0xffffffff0xffffffff
0xb0 <_ftext+176>:0x47104a000x030000b90x492025010x48214b1e
0xc0 <_ftext+192>:0x700a68020x4c240a120x601a43220x68014819
0xd0 <_ftext+208>:0x40514a220x6819d0060xd10a40290x46852000
0xe0 <_ftext+224>:0xe7fdbf300x402968190x2000d0030xbf304685
0xf0 <_ftext+240>:0x4a13e7fd0x681b4b140x682d4d150x68364e15
0x100 <_ftext+256>:0x42ac681c0x42b4d0010x4c10d1010x60146824
0x110 <_ftext+272>:0x68124a060x46953a1f0x47104a050x468d6801
0x120 <__cs3_reset_flash_works+12>:0x470868410x468d68010x470868410x03000178
0x130 <__cs3_reset_flash_works+28>:0x030004830xe000ed000x400003000x400003d4
0x140 <__cs3_start_c+8>:0x400003f00x018004700x030001600x03000164
0x150 <__cs3_start_c+24>:0x030001680x0300016c0xc0c480000x410cc601
0x160 <__cs3_start_c+40>:0x000002fc0x876543210x432187650x12345678
0x170 <__cs3_start_c+56>:0x3456abcd0xff6401420x02003fff0xffffffff
0x180 <__cs3_start_c+72>:0xffffffff0xffffffff0xffffffff0xffffffff
(gdb)
0x190 <_start>:0xffffffff0xffffffff0xffffffff0xffffffff
0x1a0 <deregister_tm_clones>:0xffffffff0xffffffff0xffffffff0xffffffff

Allother sectors are being erased and flashed otherthan sector "0".

Could you please guide me that is actually a hardware problem or some software setting is require to fix this problem?

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:35 GMT

Content originally posted in LPCWare by lpcxpresso-support on Tue Dec 30 10:07:04 MST 2014
There is no difference in using IAP to program sector 0 to programming any other sector, which, if it doesn't work, implies you have a bug in your code.

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:35 GMT

Content originally posted in LPCWare by mbilal on Tue Dec 30 21:52:54 MST 2014
OK, I see that first 512 bytes of sector "0" always has same contents as first 512 bytes on Boot ROM at location 0x03000000.
Is there require any register bit setting to avoid such mapping of memory?

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:36 GMT

Content originally posted in LPCWare by mbilal on Wed Dec 31 00:12:26 MST 2014
I found in old NXP LPC11xx user manaul that "System memory remap register" is used to remapping the memory, but there is no discription memtioned about this register in LPC5410x user manual.
If I set 0x40000000 = 0x00000002 then sector 0 is being erase and flash easily.

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:36 GMT

Content originally posted in LPCWare by lpcxpresso-support on Wed Dec 31 03:11:43 MST 2014
If you look in the Peripheral view you will see that 0x40000000 is the SYSMEMREMAP register in SYSCON peripheral. For some reason this is not documented in UM10850 - I will ask the docs team to fix this.

The ROM-based boot loader will set the to USER_FLASH (0x2) before starting your code. Having a value of 0 implies that either the bootloader did not finish, or that something in your code is writing this value (I suspect the latter)

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:37 GMT

Content originally posted in LPCWare by dztang on Thu Jan 29 13:11:32 MST 2015
The system clock parameter (in KHz) is needed on LPC541xx. It's a cut-paste error on the Users Manual.

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:37 GMT

Content originally posted in LPCWare by usb10185 on Thu Jan 29 13:56:43 MST 2015
Hi,
Just to clarify; In the IAP commands "Erase Sector" and "Copy RAM to flash", the "CPU Clock Frequency in KHz" parameter is needed. This was omitted from the UM but will be added back in the next release.
Thanks,
Ken

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:38 GMT

Content originally posted in LPCWare by mbilal on Tue Feb 17 03:03:35 MST 2015
Hi,

I'am facing very strange problem in IAP flash algorithm for LPC5410 512K board.

I wrote IAP flash algorithm that can successfully flash or erase the full 512K flash memory. I am setting "System memory remap register" to 0x2 value for using flash memory in user mode (without setting this flag first 512 bytes of FLASH maps on bottloader memory).

But problem is that flashing application never run again if I reset the target.
I observed that it is becasue, of on reset board again set the "System memory remap register" to default value "0x0" and flasing application fail to run again.
Is there any machanism to control to set ""System memory remap register"" to value 0x0 after reset , so that flashed appliaction can always run without any problems?

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:39 GMT

Content originally posted in LPCWare by mbilal on Tue Feb 17 03:05:17 MST 2015
Hi,

Please can anyone reply on last comments ASAP , becuase it is urget.

Thanks,
-Bilal

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:39 GMT

Content originally posted in LPCWare by xianghuiwang on Tue Feb 17 12:52:06 MST 2015
hi, mbilal,
if your code properly sets the sysmemremap register before the flash algorithms run, it should be effective even after the reset. It seems something else is causing an issue after reset, did you try to debug your code to see what is exactly the failure?
regards,

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:40 GMT

Content originally posted in LPCWare by mbilal on Wed Feb 18 02:00:57 MST 2015
Hi,

Now, I come with new information. I believe that its bootloader responsibily to change the value of "System memory remap register" according to user requirememt,
The ROM-based boot loader will set the to USER_FLASH (0x2) before starting the code in flash.
But what is being wrong in my side, bootloader set the "System memory remap register" value to USER_FLASH (0x2) , but on some reason/condition bootloader again reset the System memory remap register" value to (0x0).
So question is that why or on what condtion, bootloader again reset the "System memory remap register" from 0x2 to 0x0. and hence flashing does ot work.
Below is my reproduceable scenario, I set the watch point on "System memory remap register" to watch its value.

0x030000b0 in ?? ()
(gdb) watch *0x40000000
Hardware watchpoint 1: *0x40000000
(gdb) c
Continuing.
Hardware watchpoint 1: *0x40000000

Old value = 0
New value = 2
0x0300042e in ?? ()
(gdb) c
Continuing.
Hardware watchpoint 1: *0x40000000

Old value = 2
New value = 0
0x03000402 in ?? ()
(gdb)

So, what bootloader is actually doing at address between 0x0300042e and 0x03000402?
Can you please share a code of bootloader arround above address?

Thanks,
-Bilal

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:40 GMT

Content originally posted in LPCWare by lpcxpresso-support on Wed Feb 18 15:55:08 MST 2015

Putting the SYSMEMREMAP setting aside for one moment, have you calculated the checksum word for the image you're flashing? When you start an LPCXpresso debug session, the debugger calculates the checksum for you when it flashes your image. If you have code which programs a flash image "in application", your code is going to need to calculate and embed this checksum.

Here's an excerpt from the user manual:

31.3.4 Criterion for Valid User Code
The reserved CPU exception vector location 7 (offset 0x0000 001C in the vector table)
should contain the 2’s complement of the check-sum of table entries 0 through 6. This
causes the checksum of the first 8 table entries to be 0. The boot loader code checksums
the first 8 locations in sector 0 of the flash. If the result is 0, then execution control is
transferred to the user code.

Regards,
LPCXpresso Support

Re: IAP flash algorithm gives hard fault on LPC5410x board

lpcware — Wed, 15 Jun 2016 19:55:41 GMT

Content originally posted in LPCWare by mbilal on Thu Feb 19 02:09:52 MST 2015
Hi,

That's a anwser of my asked qusetion.
Thanks for great help on this issue.

Re: IAP flash algorithm gives hard fault on LPC5410x board

danielgull — Tue, 05 Dec 2017 07:12:12 GMT

I am trying to find some more documentation on the register 0x40000000 in the LPC54xxx User Manuals, but I cannot find any reference or information to this register. UM10850, UM10914 and UM10912. Where can I find more information on this register. I am working on a flash loader and need to define where or if the interrupt vectors are remapped. When will there be an update to these User Manuals describing this SYSMEMREMAP register?

Dani