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    <title>topic LPC4330 User Manual / LPCOpen bugs in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4330-User-Manual-LPCOpen-bugs/m-p/555536#M14966</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pierre on Sat Sep 20 07:02:31 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello !&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I found a few bugs in the LPC4330 manual (last revision) :&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;STRONG&gt;1) User manual "bug"&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;12.6.3.2 PLL0USB control register&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;12.6.4.2 PLL0AUDIO control register&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Register description says : Bit 1 BYPASS : Value 1 : PLL0 input clock sent to post-dividers (default).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;12.7.4.2 PLL0 description, Figure 33&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Figure means : BYPASS really bypasses everything, PLL0 input clock is sent to the output, and post-divider is ignored.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After testing, the figure is right, and the register description is wrong.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;STRONG&gt;2) LPCOpen bug&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;uart_18xx_43xx.c uses the wrong branch clocks to calculate baud rates, Chip_UART_GetClockIndex().&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It should be CLK_APBx_UARTx, not CLK_MX_UART1.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;CLK_APBx_UARTx is the clock which controls the hardware baud rate generator.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CLK_MX_UART1 simply controls the cpu bus interface.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I change the CPU frequency on the fly. This works very well. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Then I set CLK_APB0_UART0 to something else than CLK_MAINPLL, since I don't want to recompute the baud rates every time : it did not work.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Fix in uart_18xx_43xx.c :&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;STATIC CHIP_CCU_CLK_T Chip_UART_GetClockIndex(LPC_USART_T *pUART)
{
CHIP_CCU_CLK_T clkUART;

if (pUART == LPC_USART3) {
clkUART = CLK_APB2_UART3; // CLK_MX_UART3;
}
else if (pUART == LPC_USART2) {
clkUART = CLK_APB2_UART2; // CLK_MX_UART2;
}
else if (pUART == LPC_UART1) {
clkUART = CLK_APB0_UART1; // CLK_MX_UART1;
}
else {
clkUART = CLK_APB0_UART0; // CLK_MX_UART0;
}

return clkUART;
}&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After starting crystal, add UART init code :&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;Chip_UART_TXDisable(DEBUG_UART);
Chip_Clock_SetBaseClock(CLK_BASE_UART0, CLKIN_CRYSTAL, true, false );
Chip_Clock_EnableOpts(CLK_APB0_UART0, true, true, 1);
Chip_UART_SetBaudFDR(DEBUG_UART, 115200);
Chip_UART_TXEnable(DEBUG_UART);
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;It works now.&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:41:31 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:41:31Z</dc:date>
    <item>
      <title>LPC4330 User Manual / LPCOpen bugs</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4330-User-Manual-LPCOpen-bugs/m-p/555536#M14966</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pierre on Sat Sep 20 07:02:31 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello !&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I found a few bugs in the LPC4330 manual (last revision) :&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;STRONG&gt;1) User manual "bug"&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;12.6.3.2 PLL0USB control register&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;12.6.4.2 PLL0AUDIO control register&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Register description says : Bit 1 BYPASS : Value 1 : PLL0 input clock sent to post-dividers (default).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;12.7.4.2 PLL0 description, Figure 33&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Figure means : BYPASS really bypasses everything, PLL0 input clock is sent to the output, and post-divider is ignored.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After testing, the figure is right, and the register description is wrong.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;STRONG&gt;2) LPCOpen bug&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;uart_18xx_43xx.c uses the wrong branch clocks to calculate baud rates, Chip_UART_GetClockIndex().&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It should be CLK_APBx_UARTx, not CLK_MX_UART1.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;CLK_APBx_UARTx is the clock which controls the hardware baud rate generator.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CLK_MX_UART1 simply controls the cpu bus interface.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I change the CPU frequency on the fly. This works very well. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Then I set CLK_APB0_UART0 to something else than CLK_MAINPLL, since I don't want to recompute the baud rates every time : it did not work.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Fix in uart_18xx_43xx.c :&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;STATIC CHIP_CCU_CLK_T Chip_UART_GetClockIndex(LPC_USART_T *pUART)
{
CHIP_CCU_CLK_T clkUART;

if (pUART == LPC_USART3) {
clkUART = CLK_APB2_UART3; // CLK_MX_UART3;
}
else if (pUART == LPC_USART2) {
clkUART = CLK_APB2_UART2; // CLK_MX_UART2;
}
else if (pUART == LPC_UART1) {
clkUART = CLK_APB0_UART1; // CLK_MX_UART1;
}
else {
clkUART = CLK_APB0_UART0; // CLK_MX_UART0;
}

return clkUART;
}&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After starting crystal, add UART init code :&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;Chip_UART_TXDisable(DEBUG_UART);
Chip_Clock_SetBaseClock(CLK_BASE_UART0, CLKIN_CRYSTAL, true, false );
Chip_Clock_EnableOpts(CLK_APB0_UART0, true, true, 1);
Chip_UART_SetBaudFDR(DEBUG_UART, 115200);
Chip_UART_TXEnable(DEBUG_UART);
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;It works now.&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:41:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4330-User-Manual-LPCOpen-bugs/m-p/555536#M14966</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:41:31Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4330 User Manual / LPCOpen bugs</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4330-User-Manual-LPCOpen-bugs/m-p/555537#M14967</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by xianghuiwang on Mon Sep 22 18:54:33 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks, we will confirm and correct these issues.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:41:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4330-User-Manual-LPCOpen-bugs/m-p/555537#M14967</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:41:32Z</dc:date>
    </item>
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