<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic 4370 ISP &amp;quot;boot&amp;quot; in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/4370-ISP-quot-boot-quot/m-p/553287#M14536</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MikeSimmonds on Thu Sep 18 15:43:19 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am interrested in the LPC-Link2 board (4370)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If I enter ISP mode (with a low on the appropriate pin at reset) and write a program image&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;to sram at 10000000, and then 'Go'&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What is to state of (a) the M4MEMMAP register and&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;(b) clock speed, clock source, PLL1 settings etc.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Do I have to transfer to an actual code address and setup my own SP,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;or would a transfer to 1000000 take this as the vector table and set the&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;stack and initial PC from the first two entries?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards, MIke&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:37:45 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:37:45Z</dc:date>
    <item>
      <title>4370 ISP "boot"</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/4370-ISP-quot-boot-quot/m-p/553287#M14536</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MikeSimmonds on Thu Sep 18 15:43:19 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am interrested in the LPC-Link2 board (4370)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If I enter ISP mode (with a low on the appropriate pin at reset) and write a program image&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;to sram at 10000000, and then 'Go'&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What is to state of (a) the M4MEMMAP register and&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;(b) clock speed, clock source, PLL1 settings etc.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Do I have to transfer to an actual code address and setup my own SP,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;or would a transfer to 1000000 take this as the vector table and set the&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;stack and initial PC from the first two entries?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards, MIke&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:37:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/4370-ISP-quot-boot-quot/m-p/553287#M14536</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:37:45Z</dc:date>
    </item>
  </channel>
</rss>

