LPC2368 Clocking / PLL configuration

lpcware — Wed, 15 Jun 2016 19:52:18 GMT

Content originally posted in LPCWare by stazo on Fri Oct 25 07:05:33 MST 2013
Hello!

After flashing my new version of Firmware for debugging, where I only changed the clock settings, I've lost the JTAG-connectivity.

Error: JTAG scan chain interrogation failed: all zeroes

I was able to debug with the same Hardware/Software setup before, so the target power and connection should be ok.
Since i changed the clock settings I checked the JTAG clock speed, but it is 500kHz and this is ok for the IRC(4MHz) and my clock-settings(20MHz). (< 1/6 of system-clock)

I made complete powerdown for the MCU and the debugger so the new bootup should start with IRC and only when executing my code the clock-settings will be changed. Is this correct?
So the access to the Embedded ICE of the chip during early bootup (what means reset -> halt (debug-mode)) should be unchanged.
(PS: I've checked JTAG speed with oscilloscope and tried several speeds from 2kHz to 2,5MHz)

It seems that i made any persistent change with my c-code for clock setting.

I have no more ideas how to get access to the chip again.

Here is my source, which caused my actual MCU state:
PS: I coded this with the step-by-step PLL setup sequence from the Usermanual (UM10211-rev4.1,page59)

Is there anything wrong?

  // disconnect/disable
  SCB_PLLCON  = 0x0;
  SCB_PLLFEED = 0xaa;
  SCB_PLLFEED = 0x55;
  // configure
  CLKSRCSEL = 1; // Switch to main oscillator input (12 MHz)
  SCB_PLLCFG  = (0x2 << 9) | 0x19; // Fcco=2*10*12/2=120 MHz
  SCB_PLLFEED = 0xaa;
  SCB_PLLFEED = 0x55;
  // enable
  SCB_PLLCON  = 0x1;
  SCB_PLLFEED = 0xaa;
  SCB_PLLFEED = 0x55;
  // wait for lock
  while (!(SCB_PLLSTAT & (1 << 26)));
  // connect
  SCB_PLLCON  = 0x3;
  SCB_PLLFEED = 0xaa;
  SCB_PLLFEED = 0x55;
  // set CPU clock to 120/6 = 20 MHz
  CCLKCFG = 5;

What could be the reason that i get no JTAG-connection?

Setup:

* ADE7880 Evaluation Board
* NXP LPC2368
* Amontec JTAGkex-2P
* openOCD 0.7.0
* GNU gdb 6.5
* Eclipse 4.3 (Kepler)

Re: LPC2368 Clocking / PLL configuration

lpcware — Wed, 15 Jun 2016 19:52:21 GMT

Content originally posted in LPCWare by TheFallGuy on Fri Oct 25 14:39:14 MST 2013
You need to boot the device into ISP mode. See this Code Red FAQ for more information:
http://support.code-red-tech.com/CodeRedWiki/DebugAccessChip

topic Re: LPC2368 Clocking / PLL configuration in LPC Microcontrollers

LPC2368 Clocking / PLL configuration

Re: LPC2368 Clocking / PLL configuration