SPI and DMA

lpcware — Wed, 15 Jun 2016 18:33:06 GMT

Content originally posted in LPCWare by g_mocken on Thu Mar 17 10:08:52 MST 2016
I am trying to do fast bidirectional SPI transfers using DMA. While it is generally working (following the sample code, i.e. individual block transfers, no linked lists), there is something I do not understand:

My DMA_IRQHandler() is called for both errors and end of transfer events ("terminal count"), and for both DMA channels (incoming MISO and outgoing MOSI data). If I ignore the errors, it works, even my CRC protected data appears to be transferred just fine. - But what do the errors actually mean in this case?

I doubt that these are SPI FIFO overrun or underrun errors, because even slowing down the SPI clock from 15 MHz to 1 MHz does not make them go away.

Assuming that it is safe to ignore the errors, I tried to mask those IRQs in the first place by inserting

pDMAch->CONFIG &= ~GPDMA_DMACCxConfig_IE;

into "setupChannel()" (gpdma_17xx_40xx.c) at the very end. But I still receive error interrupts. Why?

Re: SPI and DMA

lpcware — Sun, 19 Jun 2016 01:05:34 GMT

bump

topic Re: SPI and DMA in LPC Microcontrollers

SPI and DMA

Re: SPI and DMA