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    <title>topic Re: Apparent buffer overflow when using DMA with HS ADC in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Apparent-buffer-overflow-when-using-DMA-with-HS-ADC/m-p/549742#M13882</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by heffalump on Wed Jun 08 17:39:23 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi there, &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I had a quick look at your code, it appears you are relying on your interrupt handler &lt;/SPAN&gt;&lt;STRONG&gt;dmaIrqCallback(void)&lt;/STRONG&gt;&lt;SPAN&gt; to halt the transfer? In my experience interrupts have significant latency, particularly if they are running from FLASH. By the time the interrupt has halted the transfer, the circular buffer created by the LLI has looped around.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If you want a single trace of 8192 samples with no circular buffering, you can set DMA to halt after the LLI element is complete using &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt; DMA_Stuff[DMA_NUM_LLI_TO_USE - 1].ctrl |= (0x1UL &amp;lt;&amp;lt; 31); // Terminal count interrupt enabled

DMA_Stuff[DMA_NUM_LLI_TO_USE - 1 ].lli = 0;&amp;nbsp; //Stop Transfer &lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I may be wrong, but I hope this helps!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Good luck!&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:36:16 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:36:16Z</dc:date>
    <item>
      <title>Apparent buffer overflow when using DMA with HS ADC</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Apparent-buffer-overflow-when-using-DMA-with-HS-ADC/m-p/549741#M13881</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by hairy.lee on Wed Jun 08 07:34:30 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm running the HS ADC at 12MHz and, using the LabTool code as a basis for capturing a block of samples, sampling a 10kHz Sine Wave. I'm not interested in trigger levels.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Using a waveform generator attached to the EXP_ADC0_DAC input of my LPC Link 2 board I can capture 8192 packed samples to SRAM (0x2000 0000 -&amp;gt; 0x2000 4000). However, when I dump them out and plot them (see 12kHz Sine image) I observe what appears to be either missed samples or a wrap around, I suspect the later. If anyone can identify the glaring mistake I'm making it would be appreciated as I clearly cant; Am I not terminating the process correctly in the ISR or is it a configuration issue? &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks in advance.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;HL&lt;/SPAN&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-337903"&gt;HSADC.c.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:36:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Apparent-buffer-overflow-when-using-DMA-with-HS-ADC/m-p/549741#M13881</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:36:15Z</dc:date>
    </item>
    <item>
      <title>Re: Apparent buffer overflow when using DMA with HS ADC</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Apparent-buffer-overflow-when-using-DMA-with-HS-ADC/m-p/549742#M13882</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by heffalump on Wed Jun 08 17:39:23 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi there, &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I had a quick look at your code, it appears you are relying on your interrupt handler &lt;/SPAN&gt;&lt;STRONG&gt;dmaIrqCallback(void)&lt;/STRONG&gt;&lt;SPAN&gt; to halt the transfer? In my experience interrupts have significant latency, particularly if they are running from FLASH. By the time the interrupt has halted the transfer, the circular buffer created by the LLI has looped around.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If you want a single trace of 8192 samples with no circular buffering, you can set DMA to halt after the LLI element is complete using &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt; DMA_Stuff[DMA_NUM_LLI_TO_USE - 1].ctrl |= (0x1UL &amp;lt;&amp;lt; 31); // Terminal count interrupt enabled

DMA_Stuff[DMA_NUM_LLI_TO_USE - 1 ].lli = 0;&amp;nbsp; //Stop Transfer &lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I may be wrong, but I hope this helps!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Good luck!&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:36:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Apparent-buffer-overflow-when-using-DMA-with-HS-ADC/m-p/549742#M13882</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:36:16Z</dc:date>
    </item>
    <item>
      <title>Re: Apparent buffer overflow when using DMA with HS ADC</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Apparent-buffer-overflow-when-using-DMA-with-HS-ADC/m-p/549743#M13883</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by hairy.lee on Thu Jun 09 02:05:51 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hey,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;I may be wrong&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Nope, that was the glaringly obvious omission I hoped someone would notice and point out. Very much appreciated, thanks!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;HL&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:36:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Apparent-buffer-overflow-when-using-DMA-with-HS-ADC/m-p/549743#M13883</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:36:17Z</dc:date>
    </item>
    <item>
      <title>Re: Apparent buffer overflow when using DMA with HS ADC</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Apparent-buffer-overflow-when-using-DMA-with-HS-ADC/m-p/549744#M13884</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;bump&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 19 Jun 2016 01:12:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Apparent-buffer-overflow-when-using-DMA-with-HS-ADC/m-p/549744#M13884</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-19T01:12:43Z</dc:date>
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