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    <title>LPC MicrocontrollersのトピックTimer0 interrupt.</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Timer0-interrupt/m-p/547325#M13464</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lenguyen on Fri Apr 04 13:27:25 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi All,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I am working on to make a timer0 interrupt at our rate every 1 msec. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Here's my Code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;void Timer0Init(uint32_t timer_freq)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Enable Timer 0 clock */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_Init(LPC_TIMER0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Timer 0 setp for match and interrupt at TIMER0TICKRATE_HZ */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_Reset(LPC_TIMER0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_MatchEnableInt(LPC_TIMER0, 1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_SetMatch(LPC_TIMER0, 1, (timer_freq / TIMER0TICKRATE_HZ));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_ResetOnMatchEnable(LPC_TIMER0, 1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_Enable(LPC_TIMER0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Enable timer 0 interrupt */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NVIC_ClearPendingIRQ(TIMER0_IRQn);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NVIC_EnableIRQ(TIMER0_IRQn);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;void TIMER0_IRQHandler(void)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Toggle GPIO1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; toggle_io1 = ~toggle_io1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_GPIO_WritePortBit(LPC_GPIO, 5, 2, toggle_io1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;if (Chip_TIMER_MatchPending(LPC_TIMER0, 1)) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_TIMER_ClearMatch(LPC_TIMER0, 1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // toggle GPIO2&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; toggle_io2 = ~toggle_io2&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_GPIO_WritePortBit(LPC_GPIO, 5, 3, toggle_io2);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Here's what I see on GPIO.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- GPIO P5.2 toggles every 2.5 uSec&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- GPIO P5.3 toggles every 1 msec.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I put the break point in timer 0 ISR routine and the timer 0 MCR = 0x18, that makes sense. My question is why the timer 0 ISR comes every 2.5 usec instead of every 1 msec ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LN&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:29:43 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:29:43Z</dc:date>
    <item>
      <title>Timer0 interrupt.</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Timer0-interrupt/m-p/547325#M13464</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lenguyen on Fri Apr 04 13:27:25 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi All,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I am working on to make a timer0 interrupt at our rate every 1 msec. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Here's my Code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;void Timer0Init(uint32_t timer_freq)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Enable Timer 0 clock */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_Init(LPC_TIMER0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Timer 0 setp for match and interrupt at TIMER0TICKRATE_HZ */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_Reset(LPC_TIMER0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_MatchEnableInt(LPC_TIMER0, 1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_SetMatch(LPC_TIMER0, 1, (timer_freq / TIMER0TICKRATE_HZ));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_ResetOnMatchEnable(LPC_TIMER0, 1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_TIMER_Enable(LPC_TIMER0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Enable timer 0 interrupt */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NVIC_ClearPendingIRQ(TIMER0_IRQn);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NVIC_EnableIRQ(TIMER0_IRQn);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;void TIMER0_IRQHandler(void)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Toggle GPIO1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; toggle_io1 = ~toggle_io1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_GPIO_WritePortBit(LPC_GPIO, 5, 2, toggle_io1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;if (Chip_TIMER_MatchPending(LPC_TIMER0, 1)) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_TIMER_ClearMatch(LPC_TIMER0, 1);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // toggle GPIO2&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; toggle_io2 = ~toggle_io2&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_GPIO_WritePortBit(LPC_GPIO, 5, 3, toggle_io2);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Here's what I see on GPIO.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- GPIO P5.2 toggles every 2.5 uSec&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- GPIO P5.3 toggles every 1 msec.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I put the break point in timer 0 ISR routine and the timer 0 MCR = 0x18, that makes sense. My question is why the timer 0 ISR comes every 2.5 usec instead of every 1 msec ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LN&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:29:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Timer0-interrupt/m-p/547325#M13464</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:29:43Z</dc:date>
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    <item>
      <title>Re: Timer0 interrupt.</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Timer0-interrupt/m-p/547326#M13465</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by xianghuiwang on Fri Apr 04 17:06:02 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi, LN,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Try clearing the timer match interrupt before toggle P5.2. You should get both P5.2 and P5.3 at 1ms toggle.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;regards,&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:29:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Timer0-interrupt/m-p/547326#M13465</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:29:44Z</dc:date>
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