topic Internal EEPROM wait state register in LPC Microcontrollers https://community.nxp.com/t5/LPC-Microcontrollers/Internal-EEPROM-wait-state-register/m-p/546505#M13274 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by qwaszx on Mon Jun 30 05:27:45 MST 2014</STRONG><BR /><SPAN>Can`t understand the calculations.</SPAN><BR /><BR /><SPAN>There is following In documentation (UM10562 chapter 37.5.1.5):</SPAN><BR /><BR /><SPAN>... </SPAN><I>Programming a <STRONG>zero</STRONG> will result in a <STRONG>one cycle wait state</STRONG>.</I><BR /><BR /><I>PHASE3 = ( 15ns * cclk) - 1 = (15ns * 120MHz) <STRONG>- 1</STRONG> = 1.8<BR />Therefore, PHASE3 = 2<BR /></I><BR /><SPAN>...</SPAN><BR /><I>Table 725. EEPROM wait state register (WSTATE - address 0x0020 0090) bit description<BR /></I><BR /><I>7:0 PHASE3 Wait states 3 (<STRONG>minus 1 encoded</STRONG>).<BR />The number of system clock periods required to give a minimum time of 15 ns.<BR /></I><BR /><BR /><STRONG>But when i calculate: </STRONG><BR /><SPAN> (15 * 0.120) </SPAN><STRONG>- 1 </STRONG><SPAN>= 1.8</SPAN><STRONG> - 1</STRONG><SPAN> = 0.8 </SPAN><BR /><SPAN>then round to nearest bigger integer = 1 </SPAN><BR /><BR /><SPAN>What have i missed? Should i decrement or not?</SPAN></BODY></HTML> Wed, 15 Jun 2016 18:29:25 GMT lpcware 2016-06-15T18:29:25Z Internal EEPROM wait state register https://community.nxp.com/t5/LPC-Microcontrollers/Internal-EEPROM-wait-state-register/m-p/546505#M13274 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by qwaszx on Mon Jun 30 05:27:45 MST 2014</STRONG><BR /><SPAN>Can`t understand the calculations.</SPAN><BR /><BR /><SPAN>There is following In documentation (UM10562 chapter 37.5.1.5):</SPAN><BR /><BR /><SPAN>... </SPAN><I>Programming a <STRONG>zero</STRONG> will result in a <STRONG>one cycle wait state</STRONG>.</I><BR /><BR /><I>PHASE3 = ( 15ns * cclk) - 1 = (15ns * 120MHz) <STRONG>- 1</STRONG> = 1.8<BR />Therefore, PHASE3 = 2<BR /></I><BR /><SPAN>...</SPAN><BR /><I>Table 725. EEPROM wait state register (WSTATE - address 0x0020 0090) bit description<BR /></I><BR /><I>7:0 PHASE3 Wait states 3 (<STRONG>minus 1 encoded</STRONG>).<BR />The number of system clock periods required to give a minimum time of 15 ns.<BR /></I><BR /><BR /><STRONG>But when i calculate: </STRONG><BR /><SPAN> (15 * 0.120) </SPAN><STRONG>- 1 </STRONG><SPAN>= 1.8</SPAN><STRONG> - 1</STRONG><SPAN> = 0.8 </SPAN><BR /><SPAN>then round to nearest bigger integer = 1 </SPAN><BR /><BR /><SPAN>What have i missed? Should i decrement or not?</SPAN></BODY></HTML> Wed, 15 Jun 2016 18:29:25 GMT https://community.nxp.com/t5/LPC-Microcontrollers/Internal-EEPROM-wait-state-register/m-p/546505#M13274 lpcware 2016-06-15T18:29:25Z Re: Internal EEPROM wait state register https://community.nxp.com/t5/LPC-Microcontrollers/Internal-EEPROM-wait-state-register/m-p/546506#M13275 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by embd02161991 on Fri Jul 11 15:49:10 MST 2014</STRONG><BR /><SPAN>Hi,</SPAN><BR /><BR /><SPAN>Thanks for pointing this out. We will update the user manual.</SPAN><BR /><BR /><SPAN>Thanks,</SPAN><BR /><SPAN>NXP Technical Support</SPAN></BODY></HTML> Wed, 15 Jun 2016 18:29:25 GMT https://community.nxp.com/t5/LPC-Microcontrollers/Internal-EEPROM-wait-state-register/m-p/546506#M13275 lpcware 2016-06-15T18:29:25Z