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    <title>topic [SOLVED] LPC11U68 SPI problem in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/SOLVED-LPC11U68-SPI-problem/m-p/544634#M12919</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by cstephant on Fri Mar 14 07:14:29 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;HI,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm using SSP1 port on a LPC11U68.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; It's working correctly but I have to change the MISO pin from PIO1_21 to PIO0_22 which is normally possible ( -&amp;gt; UserManual says : PIO0_22 R/W 0x058 I/O configuration for pin PIO0_22/AD6/CT16B1_MAT1/MISO1 ).&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I changed the pin config according to the user manual :&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 21, IOCON_FUNC0 | IOCON_MODE_INACT); &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 22, IOCON_FUNC3 | IOCON_MODE_INACT); &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;UM : &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2:0 FUNC Selects pin function. Values 0x4 to 0x7 are reserved. 000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x0 PIO0_22.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x1 AD6.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x2 CT16B1_MAT1.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x3 MISO1.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The RNE (Reciever FIFO Not Empty) flag in the SSP1 Status register is going up when I recieve a frame but there is no datas available in the Data Register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Any idea of what I'm doing wrong with this pin configuration ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:45:30 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:45:30Z</dc:date>
    <item>
      <title>[SOLVED] LPC11U68 SPI problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SOLVED-LPC11U68-SPI-problem/m-p/544634#M12919</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by cstephant on Fri Mar 14 07:14:29 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;HI,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm using SSP1 port on a LPC11U68.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; It's working correctly but I have to change the MISO pin from PIO1_21 to PIO0_22 which is normally possible ( -&amp;gt; UserManual says : PIO0_22 R/W 0x058 I/O configuration for pin PIO0_22/AD6/CT16B1_MAT1/MISO1 ).&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I changed the pin config according to the user manual :&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 21, IOCON_FUNC0 | IOCON_MODE_INACT); &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 22, IOCON_FUNC3 | IOCON_MODE_INACT); &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;UM : &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2:0 FUNC Selects pin function. Values 0x4 to 0x7 are reserved. 000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x0 PIO0_22.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x1 AD6.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x2 CT16B1_MAT1.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x3 MISO1.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The RNE (Reciever FIFO Not Empty) flag in the SSP1 Status register is going up when I recieve a frame but there is no datas available in the Data Register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Any idea of what I'm doing wrong with this pin configuration ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:45:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SOLVED-LPC11U68-SPI-problem/m-p/544634#M12919</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:45:30Z</dc:date>
    </item>
    <item>
      <title>Re: [SOLVED] LPC11U68 SPI problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SOLVED-LPC11U68-SPI-problem/m-p/544635#M12920</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by wellsk on Fri Mar 14 09:00:56 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If the pin muxing is correct, you might need to also add the 'digitial pin' flag.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 21, IOCON_FUNC0 | IOCON_MODE_INACT | &lt;/SPAN&gt;&lt;STRONG&gt;IOCON_DIGMODE_EN&lt;/STRONG&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 22, IOCON_FUNC3 | IOCON_MODE_INACT | &lt;/SPAN&gt;&lt;STRONG&gt;IOCON_DIGMODE_EN&lt;/STRONG&gt;&lt;SPAN&gt;); &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Here is the info on bit 7 for p0_22:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;7 ADMODE Analog mode. 1&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0 Enable. Pin is configured as analog input.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;1 Disable. Pin is configured as digital I/O.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Here is the info on bit 7 for p1_21:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;9:7 - - Reserved. 0b001&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Note: Chip_IOCON_PinMuxSet() sets the IOCON registers *exactly* with the values that you pass, so you'll need to handle to digital or reserved bits in the call.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:45:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SOLVED-LPC11U68-SPI-problem/m-p/544635#M12920</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:45:31Z</dc:date>
    </item>
    <item>
      <title>Re: [SOLVED] LPC11U68 SPI problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SOLVED-LPC11U68-SPI-problem/m-p/544636#M12921</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by cstephant on Fri Mar 14 09:39:51 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;It works thanks a lot!&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I check and double check all paremeter but I was thinking that the Analog is disabled with a 0.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Next time I will triple check.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Best Regards&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:45:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SOLVED-LPC11U68-SPI-problem/m-p/544636#M12921</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:45:31Z</dc:date>
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