topic Re: I2C register access problem in LPC Microcontrollers

I2C register access problem

lpcware — Wed, 15 Jun 2016 18:27:32 GMT

Content originally posted in LPCWare by goweol on Mon Mar 30 02:57:58 MST 2015
mmap /dev/mem and accessing the I2C data register gave me a fault.
Here is a linux command line log:

~ # md -w4 0x400a0000 4
Unhandled fault: external abort on non-linefetch (0x008) at 0x40156000
Bus error
~ # md -w4 0x400a0004 4
400a0004: 000022c0
~ # md -w4 0x400a0004 16
400a0004: 000022c0 00000000 0000033e 0000033e
~ # md -w4 0x400a8004 4
400a8004: 00002ac0
~ # md -w4 0x400a8000 4
Unhandled fault: external abort on non-linefetch (0x008) at 0x40132000
Bus error

As you can see, I cannot read '0x400a0000' (I2Cn rx data fifo register).
How I can access I2Cn rx/tx data FIFO register (as superuser)?
Does it possible?

NOTE: 'md' internally mmaps pagesize aligned address with multiple pagesize size (based on command line dump size) and dump the given address with given size..

Re: I2C register access problem

lpcware — Wed, 15 Jun 2016 18:27:33 GMT

Content originally posted in LPCWare by goweol on Mon Mar 30 17:11:02 MST 2015
It seems I made a mistake. In the user manual, I found:
"If the RX FIFO is read while empty, a DATA ABORT exception is generated"

Re: I2C register access problem

lpcware — Wed, 15 Jun 2016 18:27:33 GMT

Content originally posted in LPCWare by vikhyathk on Mon Oct 19 22:08:48 MST 2015
I am facing a problem with i2C transmission using LPC3250. I m using processor to interface FPGA with device id 0xA0. So the first data I put into '0x400a8000' (I2C2_TX) register is 0x1A0 and I see in the oscilloscope that start condition is generated and acknowledgement is present.

But Whenever I send a data byte later with LSB bit '1', the same data is being resent with LSB bit made '0'.
Example: If I put "11011001' into the register '0x400a8000' (I2C2_TX) Data found in scope is ["11011001" 'Ack bit' "11011000"'Ack bit']..
'Ack bit' is '0'.

Can anybody help me to solve the issue.