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    <title>topic Three PWMs from the same timer in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Three-PWMs-from-the-same-timer/m-p/538381#M11660</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by audriusmerfeldas on Sat Jan 16 16:33:14 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi there,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I am trying to get 3 different PWM signals from the same timer, but there is a problem with timer match register 3. I am getting high level on Port2_8. Both mat0 and mat1 work perfer=ct&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#include "LPC11xx.h"&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* LPC11xx definitions */
#include "gpio.h"
#include &amp;lt;cr_section_macros.h&amp;gt;
#include &amp;lt;NXP/crp.h&amp;gt;

// Variable to store CRP value in. Will be placed automatically
// by the linker when "Enable Code Read Protect" selected.
// See crp.h header for more information
__CRP const unsigned int CRP_WORD = CRP_NO_CRP ;

int main(void)
{

 LPC_TMR32B0-&amp;gt;TCR = 0; //Disable Timer0
 LPC_SYSCON-&amp;gt;SYSAHBCLKCTRL |= (1&amp;lt;&amp;lt;9); // System AHB clock control enable clock to timer32 0
 LPC_TMR32B0-&amp;gt;EMR = (1&amp;lt;&amp;lt;0)|(1&amp;lt;&amp;lt;1)|(1&amp;lt;&amp;lt;2)|(1&amp;lt;&amp;lt;3)|(1&amp;lt;&amp;lt;5)|(1&amp;lt;&amp;lt;7)|(1&amp;lt;&amp;lt;8)|(1&amp;lt;&amp;lt;11); // Setup the external match register (1&amp;lt;&amp;lt;0 : EM0 connected to pin) : 18.7.10 External Match Register
 // 1&amp;lt;&amp;lt;5 : Set the corresponding External Match bit/output to 1
 // 1&amp;lt;&amp;lt;10 : Clear the corresponding External Match bit/output to 0 (CT16Bn_MATm pin is LOW if pinned out : (1&amp;lt;&amp;lt;3).

 LPC_IOCON-&amp;gt;PIO1_6 &amp;amp;= ~0x07; // Clears the FUNC bits : 8.4.23 IOCON_PIO1_6
 LPC_IOCON-&amp;gt;PIO1_6 |= 0x02; // Selects function CT32B0_MAT0. PIO1_6
 LPC_IOCON-&amp;gt;PIO1_7 &amp;amp;= ~0x07; // Clears the FUNC bits : 8.4.24 IOCON_PIO1_7
 LPC_IOCON-&amp;gt;PIO1_7 |= 0x02; // Selects function CT32B0_MAT1. PIO1_7
 LPC_IOCON-&amp;gt;PIO2_8 &amp;amp;= ~0x07; // Clears the FUNC bits : 8.4.24 IOCON_PIO1_7
 LPC_IOCON-&amp;gt;PIO2_8 |= 0x02; // Selects function CT32B0_MAT1. PIO1_7

 // These are compared against the TC ( Timer Counter )
 LPC_TMR32B0-&amp;gt;MR2 = 1000-1; // Setup the match registers
 LPC_TMR32B0-&amp;gt;MR0 = 500; // Match Register 0 - PWM1 value
 LPC_TMR32B0-&amp;gt;MR1 = 500; //PWM2 value
 LPC_TMR32B0-&amp;gt;MR3 = 500; //PWM3 value
 LPC_TMR32B0-&amp;gt;MCR = 1&amp;lt;&amp;lt;7; // OK : Match Control Register : 1&amp;lt;&amp;lt;7 = Reset on MR2
 // If needed : 1&amp;lt;&amp;lt;9 = Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.
 LPC_TMR32B0-&amp;gt;PWMC = 0b1111; // OK : PWM Control Register to enable the selected PWMs
 // 0x01 : PWM mode is enabled for CT32Bn_MAT0
 // 0x02 : PWM mode is enabled for CT32Bn_MAT1
 // 0x04 : PWM mode is enabled for CT32Bn_MAT2
 // 0x08 : PWM mode is enabled for match channel 3

 NVIC_EnableIRQ(TIMER_32_0_IRQn); // Enable the TIMER1 Interrupt
 LPC_TMR32B0-&amp;gt;TCR = 1; // Enable Timer16

 while(1)
 {
 }

}
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:41:49 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:41:49Z</dc:date>
    <item>
      <title>Three PWMs from the same timer</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Three-PWMs-from-the-same-timer/m-p/538381#M11660</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by audriusmerfeldas on Sat Jan 16 16:33:14 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi there,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I am trying to get 3 different PWM signals from the same timer, but there is a problem with timer match register 3. I am getting high level on Port2_8. Both mat0 and mat1 work perfer=ct&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#include "LPC11xx.h"&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* LPC11xx definitions */
#include "gpio.h"
#include &amp;lt;cr_section_macros.h&amp;gt;
#include &amp;lt;NXP/crp.h&amp;gt;

// Variable to store CRP value in. Will be placed automatically
// by the linker when "Enable Code Read Protect" selected.
// See crp.h header for more information
__CRP const unsigned int CRP_WORD = CRP_NO_CRP ;

int main(void)
{

 LPC_TMR32B0-&amp;gt;TCR = 0; //Disable Timer0
 LPC_SYSCON-&amp;gt;SYSAHBCLKCTRL |= (1&amp;lt;&amp;lt;9); // System AHB clock control enable clock to timer32 0
 LPC_TMR32B0-&amp;gt;EMR = (1&amp;lt;&amp;lt;0)|(1&amp;lt;&amp;lt;1)|(1&amp;lt;&amp;lt;2)|(1&amp;lt;&amp;lt;3)|(1&amp;lt;&amp;lt;5)|(1&amp;lt;&amp;lt;7)|(1&amp;lt;&amp;lt;8)|(1&amp;lt;&amp;lt;11); // Setup the external match register (1&amp;lt;&amp;lt;0 : EM0 connected to pin) : 18.7.10 External Match Register
 // 1&amp;lt;&amp;lt;5 : Set the corresponding External Match bit/output to 1
 // 1&amp;lt;&amp;lt;10 : Clear the corresponding External Match bit/output to 0 (CT16Bn_MATm pin is LOW if pinned out : (1&amp;lt;&amp;lt;3).

 LPC_IOCON-&amp;gt;PIO1_6 &amp;amp;= ~0x07; // Clears the FUNC bits : 8.4.23 IOCON_PIO1_6
 LPC_IOCON-&amp;gt;PIO1_6 |= 0x02; // Selects function CT32B0_MAT0. PIO1_6
 LPC_IOCON-&amp;gt;PIO1_7 &amp;amp;= ~0x07; // Clears the FUNC bits : 8.4.24 IOCON_PIO1_7
 LPC_IOCON-&amp;gt;PIO1_7 |= 0x02; // Selects function CT32B0_MAT1. PIO1_7
 LPC_IOCON-&amp;gt;PIO2_8 &amp;amp;= ~0x07; // Clears the FUNC bits : 8.4.24 IOCON_PIO1_7
 LPC_IOCON-&amp;gt;PIO2_8 |= 0x02; // Selects function CT32B0_MAT1. PIO1_7

 // These are compared against the TC ( Timer Counter )
 LPC_TMR32B0-&amp;gt;MR2 = 1000-1; // Setup the match registers
 LPC_TMR32B0-&amp;gt;MR0 = 500; // Match Register 0 - PWM1 value
 LPC_TMR32B0-&amp;gt;MR1 = 500; //PWM2 value
 LPC_TMR32B0-&amp;gt;MR3 = 500; //PWM3 value
 LPC_TMR32B0-&amp;gt;MCR = 1&amp;lt;&amp;lt;7; // OK : Match Control Register : 1&amp;lt;&amp;lt;7 = Reset on MR2
 // If needed : 1&amp;lt;&amp;lt;9 = Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.
 LPC_TMR32B0-&amp;gt;PWMC = 0b1111; // OK : PWM Control Register to enable the selected PWMs
 // 0x01 : PWM mode is enabled for CT32Bn_MAT0
 // 0x02 : PWM mode is enabled for CT32Bn_MAT1
 // 0x04 : PWM mode is enabled for CT32Bn_MAT2
 // 0x08 : PWM mode is enabled for match channel 3

 NVIC_EnableIRQ(TIMER_32_0_IRQn); // Enable the TIMER1 Interrupt
 LPC_TMR32B0-&amp;gt;TCR = 1; // Enable Timer16

 while(1)
 {
 }

}
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:41:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Three-PWMs-from-the-same-timer/m-p/538381#M11660</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:41:49Z</dc:date>
    </item>
    <item>
      <title>Re: Three PWMs from the same timer</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Three-PWMs-from-the-same-timer/m-p/538382#M11661</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by R2D2 on Sat Jan 16 17:21:09 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: audriusmerfeldas&lt;/STRONG&gt;&lt;BR /&gt;...but there is a problem with timer match register 3. I am getting high level on Port2_8.&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; :quest: &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Then use LPC_IOCON-&amp;gt;PIO2_8 setup for CT32B0_MAT3&amp;nbsp; :O &lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:41:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Three-PWMs-from-the-same-timer/m-p/538382#M11661</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:41:50Z</dc:date>
    </item>
    <item>
      <title>Re: Three PWMs from the same timer</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Three-PWMs-from-the-same-timer/m-p/538383#M11662</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by audriusmerfeldas on Sun Jan 17 02:50:28 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Waw thanks a lot mate. Havent noticed that for this pin I need to set 0x1. You have saved the day. Thanks&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:41:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Three-PWMs-from-the-same-timer/m-p/538383#M11662</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:41:51Z</dc:date>
    </item>
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