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    <title>LPC MicrocontrollersのトピックNMI support?</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/NMI-support/m-p/535168#M10955</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by atomicdog on Sat Jun 30 17:22:08 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;The user manual says that "The NMI is not implemented on the LPC111x/LPC11Cxx"&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Setting NMIPENDSET appears to work though when debugging with LPC-link.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SCB-&amp;gt;ICSR = SCB_ICSR_NMIPENDSET_Msk&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is it OK to use the NMI from a software interrupt?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Or should this be considered undefined behavior?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:35:16 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:35:16Z</dc:date>
    <item>
      <title>NMI support?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/NMI-support/m-p/535168#M10955</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by atomicdog on Sat Jun 30 17:22:08 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;The user manual says that "The NMI is not implemented on the LPC111x/LPC11Cxx"&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Setting NMIPENDSET appears to work though when debugging with LPC-link.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SCB-&amp;gt;ICSR = SCB_ICSR_NMIPENDSET_Msk&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is it OK to use the NMI from a software interrupt?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Or should this be considered undefined behavior?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:35:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/NMI-support/m-p/535168#M10955</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:35:16Z</dc:date>
    </item>
    <item>
      <title>Re: NMI support?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/NMI-support/m-p/535169#M10956</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Daniel Widyanto on Thu Nov 08 19:38:32 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Just for clarification, NXP is implementing ARM Cortex-M0 core completely. Hence, the NMI function will always be there, but it may not be connected to external pin / peripherals.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;"The NMI is not implemented on the LPC111x/LPC11Cxx" should be interpreted as cannot be used to generate interrupt from peripherals or pin. But, of course, it could be used for software interrupt without any restriction.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;FYI also, the LPC1100XL series and LPC11Uxx series implement NMI (as in you can connect the NMI to other peripherals / GPIO pin interrupt).&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:35:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/NMI-support/m-p/535169#M10956</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:35:17Z</dc:date>
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