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    <title>LPC MicrocontrollersのトピックGCC 4.8.1 links ARM code for M0 target</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/GCC-4-8-1-links-ARM-code-for-M0-target/m-p/535115#M10949</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MarcVonWindscooting on Sat Sep 28 06:02:56 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I ran into big trouble. I installed GCC 4.8.1 yesterday.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;When building a program that uses an integer divide operation, I end up with gcc linking in some code that contains ARM (32-bit) instructions.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;These instructions crash the M0 of course, because that cannot be switched into ARM mode.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What command-line switch did I miss?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I link using gcc, not ld. I have to link using -lgcc because I supply -nostartfiles and -nostdlibs.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The ARM code comes out of thumb/libgcc.a&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I does a mode switch by bx to an ARM integer divide function&amp;nbsp; |( &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The switches&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;-mthumb&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;-mcpu=cortex-m0plus&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;don't make a difference. Maybe they only apply to compiling, not to linking.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:34:52 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:34:52Z</dc:date>
    <item>
      <title>GCC 4.8.1 links ARM code for M0 target</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/GCC-4-8-1-links-ARM-code-for-M0-target/m-p/535115#M10949</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MarcVonWindscooting on Sat Sep 28 06:02:56 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I ran into big trouble. I installed GCC 4.8.1 yesterday.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;When building a program that uses an integer divide operation, I end up with gcc linking in some code that contains ARM (32-bit) instructions.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;These instructions crash the M0 of course, because that cannot be switched into ARM mode.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What command-line switch did I miss?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I link using gcc, not ld. I have to link using -lgcc because I supply -nostartfiles and -nostdlibs.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The ARM code comes out of thumb/libgcc.a&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I does a mode switch by bx to an ARM integer divide function&amp;nbsp; |( &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The switches&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;-mthumb&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;-mcpu=cortex-m0plus&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;don't make a difference. Maybe they only apply to compiling, not to linking.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:34:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/GCC-4-8-1-links-ARM-code-for-M0-target/m-p/535115#M10949</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:34:52Z</dc:date>
    </item>
    <item>
      <title>Re: GCC 4.8.1 links ARM code for M0 target</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/GCC-4-8-1-links-ARM-code-for-M0-target/m-p/535116#M10950</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MarcVonWindscooting on Sun Sep 29 15:40:06 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Found a solution:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fgcc.gnu.org%2Fml%2Fgcc-help%2F2012-12%2Fmsg00021.html" rel="nofollow" target="_blank"&gt;http://gcc.gnu.org/ml/gcc-help/2012-12/msg00021.html&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:34:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/GCC-4-8-1-links-ARM-code-for-M0-target/m-p/535116#M10950</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:34:53Z</dc:date>
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