topic Re: Systick maximum rate in LPC Microcontrollers

Systick maximum rate

lpcware — Wed, 15 Jun 2016 19:31:18 GMT

Content originally posted in LPCWare by member_lpc11xx on Tue Mar 03 09:00:42 MST 2015
Hello everybody,

I'm working with LPC1112FD20, using internal RC and clocking ARM core at 12MHz. My program has only to set the board and in the main task read an ADC channel and then set an output.
In previous project I always have configured system timer (SysTick) so that it runs at 1 KHz, therefore interrupt every 1ms. Now I need to set its frequency at 1MHz, but here comes the problem: I'm unable to make it work at that rate. Application do everything in the right way till it reaches ARM defined routine "SysTick_Config()": at this time my program stop running.

My first doubt have been that ARM core clock is too slow, so I've increased it to 48MHz (keeping IRC as clock source and enabling PLL), near maximum rate for LPC11xx microcontrollers (50MHz). Results: no change, same problem; when calling "SysTick_Config()" application stops.

So, I've tried do another test on the LPC-Link board with a LPC1114FBD48 mounted on it: same core (Cortex-M0) but more resources. Nothing has changed.

I specify that in the System Tick interrupt routine the only thing I do is toggling a pin to generate an output square wave and measure its frequency with the scope.
Maximum SysTick frequency I can configure keeping the application running is 400KHz (interrupt every 2,5us).

Now, my doubt is that maybe core clock isn't enough fast to serve and execute an ISR every microsecond. Reading "A Beginner’s Guide on Interrupt Latency - and Interrupt Latency of the ARM® Cortex®-M processors" article I've understood that to enter and exit an interrupt request 32 clock cycles (16+16) are needed: so 36/48000000 = 670ns only to manage ISR.

Has anyone experience same issue and/or confirm me if what I suppose is the right consideration for this "problem"?

Thanks to anyone who help me
regards

Andrea

Re: Systick maximum rate

lpcware — Wed, 15 Jun 2016 19:31:19 GMT

Content originally posted in LPCWare by wellsk on Tue Mar 03 09:56:00 MST 2015
I suspect the sysTick interrupt processing is occurring 100% of the time. Once the systick interrupt is enabled is SysTick_Config(), the background processing is stalled forever and it gives the appearance of hanging in that function. A 1MHz interrupt that the CPU needs to handle is very aggressive for a 50Mhz device - with the context switch, extra wait states needed for FLASH operation @ 50Mhz, GPIO register access latency, etc. - your probably easily using up your budget of 50 system clocks per interrupt.

Consider another design approach (ie, maybe setting up the system to handle an event on an ADC sample and using a background thread to process the ADC data without interrupts). You can get some performance back from FLASH by moving ISR code to IRAM.

Re: Systick maximum rate

lpcware — Wed, 15 Jun 2016 19:31:20 GMT

Content originally posted in LPCWare by starblue on Tue Mar 03 10:56:56 MST 2015
Have you considered an LPC82x? Slower CPU, but maybe the analog comparators and the SCT can do what you want (you didn't tell us much)?

Re: Systick maximum rate

lpcware — Wed, 15 Jun 2016 19:31:21 GMT

Content originally posted in LPCWare by member_lpc11xx on Wed Mar 04 03:51:22 MST 2015
You confirm my doubt wellsk. I'm not using ADC interrupt to execute readings, the only interrupt is the SysTick. I'll try moving ISR in RAM.

To answerto starblue, we are currently using LPC1112 on a wide parts of our custom products, so we are trying to keep this microcontroller for each application we need.
The reason I've tried clocking the System Timer at 1MHz is that I need a reference timer with base time of 1us, to manage the physical layer of a communication protocol.
I know I can use one of the peripheral timers (TMR16B0 or TMR32B0), but I've observed strange behaviour of them, as I've stated in this forum thread http://www.lpcware.com/content/forum/timer-1632-bit-wrong-counting .

Thanks everyone of you,starblue and wellsk.

Andrea

Re: Systick maximum rate

lpcware — Wed, 15 Jun 2016 19:31:21 GMT

Content originally posted in LPCWare by TheFallGuy on Wed Mar 04 04:02:06 MST 2015
Do the math:
Clock = 48MHz
Systick rate = 1MHz

gives you 48 cycles to execute your Systick handler
Minimum exception (interrupt) handling latency is 16 cycles. I guess the return is going to be similar
This leaves you about 16 cycles to do some real work

Most (but not all) instructions are single cycle, so your maximum instructions is 16 (but likely to be less)
Flash is not zero wait state, further reducing the number of instructions you can execute

So, at 48MHz with a 1MHz Systick, you are going to be doing nothing else but service Systick AND you are going to have to do some very tight coding in the handler...

Re: Systick maximum rate

lpcware — Wed, 15 Jun 2016 19:31:22 GMT

Content originally posted in LPCWare by starblue on Thu Mar 05 01:39:24 MST 2015

Quote: member_lpc11xx
The reason I've tried clocking the System Timer at 1MHz is that I need a reference timer with base time of 1us, to manage the physical layer of a communication protocol.

You can use some other timer and set the prescaler so that the main counter ticks at 1MHz. Then you can easily read time stamps directly out of the timer. You can also use it to generate interrupts at certain points in time. (I've done just that on an LPC11C14, with a free running 32 bit timer.)

Re: Systick maximum rate

lpcware — Wed, 15 Jun 2016 19:31:23 GMT

Content originally posted in LPCWare by member_lpc11xx on Fri Mar 06 02:11:29 MST 2015
I agree with wellsk and TheFallGuy considerations about SysTick. So my idea is to use a peripheral timer (16 or 32 bit) to generate the reference clock, but, as you know starblue, I've problem with this clock accuracy when I set it to relative high frequency (greater than 100KHz).