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    <title>LPC Microcontrollers中的主题 Re: Use M3MEMMAP register</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530689#M10059</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by FlorentCapelle on Sat Nov 24 12:37:08 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Rolf,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you for this useful reply as I did not even know about the VTOR register. Now I know :-)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is the procedure the same if my application is actually linked to address 0x00000000 but placed at address 0x1A00C000?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Florent&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:18:11 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:18:11Z</dc:date>
    <item>
      <title>Use M3MEMMAP register</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530687#M10057</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by FlorentCapelle on Sat Nov 24 10:06:55 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I am implementing a simple bootloader on a LPC1857.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;My bootloader code is in the internal flash bank A at 0x1A000000.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;My application code is in the internal flash bank A at 0x1A00C000.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In my bootloader, what should the sequence be (using M3MEMMAP register) to jump to my application code?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for any tip!&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Florent&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:18:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530687#M10057</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:18:09Z</dc:date>
    </item>
    <item>
      <title>Re: Use M3MEMMAP register</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530688#M10058</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DF9DQ on Sat Nov 24 12:26:26 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Florent,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Your application is linked to address 0x1A00C000, and has its own exception vector table at that address.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The necessary steps are:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- Load the main stack pointer with the content of the first word of the application vector table.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- Set VTOR to 0x1A00C000.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- Jump to the address indicated by the second word of the application vector table.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;M3MEMMAP is not involved at all.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Loading VTOR in the boot loader is optional. It can also be done by the application itself.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Rolf&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:18:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530688#M10058</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:18:10Z</dc:date>
    </item>
    <item>
      <title>Re: Use M3MEMMAP register</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530689#M10059</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by FlorentCapelle on Sat Nov 24 12:37:08 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Rolf,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you for this useful reply as I did not even know about the VTOR register. Now I know :-)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is the procedure the same if my application is actually linked to address 0x00000000 but placed at address 0x1A00C000?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Florent&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:18:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530689#M10059</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:18:11Z</dc:date>
    </item>
    <item>
      <title>Re: Use M3MEMMAP register</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530690#M10060</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DF9DQ on Sun Nov 25 01:30:05 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Florent,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;While you could do that (link your application to 0x0000C000, set M3MEMMAP=0x1A000000), there is nothing you can gain from it. It only adds an extra level of indirection.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Access speed, and the availability of debug resources are the same for both addresses. My suggestion is to link to the physical address, and ignore M3MEMMAP...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Rolf&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:18:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530690#M10060</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:18:11Z</dc:date>
    </item>
    <item>
      <title>Re: Use M3MEMMAP register</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530691#M10061</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by starblue on Mon Nov 26 05:27:02 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;gt; [...] I did not even know about the VTOR register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;It is described in the user manual for the core,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;DUI0552A "Cortex-M3 Devices Generic User Guide" from ARM.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Finfocenter.arm.com%2Fhelp%2Ftopic%2Fcom.arm.doc.dui0552a%2FDUI0552A_cortex_m3_dgug.pdf" rel="nofollow" target="_blank"&gt;http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/DUI0552A_cortex_m3_dgug.pdf&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Jürgen&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:18:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530691#M10061</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:18:12Z</dc:date>
    </item>
    <item>
      <title>Re: Use M3MEMMAP register</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530692#M10062</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by uratan on Thu Nov 29 20:32:00 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;But I want to know more about M3MEMMAP...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; - * - * -&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm trying LPC1830-Xplorer (rev.A), have started to read UM10430 (Rev.2).&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;And started to try to port "LPC1830_Xplorer_PeripheralTest" program&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;(in lpc1830_Xplorer_Keil.zip) for my gcc environment.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Now, about M3MEMMAP, my thought below is correct ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; (see Fig.7 in Chap.2, UM10430)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;OL&amp;gt;&amp;lt;LI&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; I can not read/write AHB SRAMs(0x2000_0000) thru shadow&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; window(0x0000_0000) by setting M3MEMMAP = 0x2000_0000.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; Devices which real-address is out of code space (0x0000_0000--0x1FFF_FFFF)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; can not be remapped by M3MEMMAP.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; Or simply because, in Fig.7, AHB SRAMs do not have connections on&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; I-code/D-code bus in AHB multilayer matrix.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; (FYI: I can run program from AHB SRAM(0x2000_0000).)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; (FYI: I can write to local SRAMs(0x1000_0000) thru shadow window.)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/LI&amp;gt;&amp;lt;LI&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; I linked above my PeripheralTest program on 0x0000_0000 to run&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; thru shadow window.&amp;nbsp; But with this setting, I could not send&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; correct USB descriptors which is in const section.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; After dark 2 days, I can fix this by making DTD to point&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; real-device-addresses.&amp;nbsp; (USB_ProgDTD() in usbhw.c)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &amp;lt;PRE&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; if(ptrBuff &amp;lt; 0x10000000) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ptrBuff += LPC_CREG-&amp;gt;M3MEMMAP;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; }&amp;lt;/PRE&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; About USB_DMA, this is correct because there is no conversion&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; unit between USB unit and memory.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/LI&amp;gt;&amp;lt;/OL&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;In total, address conversion unit of M3MEMMAP is just beside of&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Cortex-M3, near I-code/D-code bus... ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;It seems that M3MEMMAP function is belong to NXP, not M3-core,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;so I want NXP to announce a little more info about M3MEMMAP...please.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; - * - * -&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I can now connect to virtual com port both from SPIFI-boot and&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;uart-boot by same binary. You can see it at test-peri/*, in minimon-012.zip,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;from &amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww002.upp.so-net.ne.jp%2Furatan%2Fxplr%2Fendex.html%23mFmore2" rel="nofollow" target="_blank"&gt;http://www002.upp.so-net.ne.jp/uratan/xplr/endex.html#mFmore2&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; - * - * -&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;( Manual is all, for me...)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; * about Fig.1, Fig.2, Fig.7, Fig.8,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; both word "DMA" and "GPDMA" are used, confused...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; footnote comment marking "(1)" is used but not described...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; * end address in title of Table.189, 190 must be wrong...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; * description for 'WS' is missing in Table 383. (used in Table 417, 422)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; * in Table 409/410, using "bit 3" for EPTN/EPTNE may be ambiguous,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; calling them like table 417 is welcome.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:18:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530692#M10062</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:18:13Z</dc:date>
    </item>
    <item>
      <title>Re: Use M3MEMMAP register</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530693#M10063</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by uratan on Tue Dec 11 19:57:02 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I have found new information about the MEMMAP function in&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; "Technical note TN00006 - LPC1800 and LPC4300 MxMEMMAP memory map"&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;PRE&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; ***************************&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; ** Thank you very much ! **&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; ***************************&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/PRE&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; (but...)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;- * - * -&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I will write a little more my hope about NXP's resource managemant.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;OL&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;LI&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The All-in-one document package "LPC1830FET100.zip"&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;(which I'm downloading from &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fproducts%2Fmicrocontrollers%2F" rel="nofollow" target="_blank"&gt;http://www.nxp.com/products/microcontrollers/&lt;/A&gt;&lt;SPAN&gt;..., I believe this site is the master, above TN00006.pdf is in this)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;shall have release date in its filename.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;BLOCKQUOTE&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;REASON: I can aware the renewal easyly by it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The CMSIS package "lpc18xx-2012-12-11.zip" and&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Open platform package "LPCOpen_platform_v0.51.zip"&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;(I download both from LPCware.com)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;have release date or version number. Why the documents not ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/BLOCKQUOTE&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/LI&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;LI&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Please leave old version of documents/resources on the web.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;BLOCKQUOTE&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;REASON: I will keep my base packages about my development,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;so I can see my modification anytime by comparing my code&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;and based one.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;But if I get some outcome which is done by others for reference,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I may not have the packages which he was based on.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I can not extract so easyly the modifications which is done by him.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Also, I can trace the version up history anytime I want.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; (And I can detect &amp;nbsp; I was wrong &amp;nbsp; or &amp;nbsp;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;the document was wrong &amp;nbsp;,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;in the future, to make correct feedback to me)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/BLOCKQUOTE&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/LI&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/OL&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I can not concentrate my mind for my development because&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I must watch the web for the update day by day... &amp;nbsp; &amp;amp;nbsp ;-)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;amp;nbsp (Wed Dec 12 11:53:53 JST 2012)&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:18:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Use-M3MEMMAP-register/m-p/530693#M10063</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:18:13Z</dc:date>
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