topic Re: ADC multi ch with DMA on KL27 in Kinetis Software Development Kit

ADC multi ch with DMA on KL27

shuichiy — Wed, 11 Oct 2017 06:19:02 GMT

Hi, I'm now working on KL27Z256 with KSDK2.0.

My goal is to get 5ch data via ADC with DMA transfer.

I think 5*16bit ADC0-RA data should be stored in memory in a row, and ADC0->SC1 is switched automatically.

In my codes attached, only the first 16bit data is stored in memory even if ADC0->SC1 seems to be changed.

Unfortunately I haven't found any sample codes on the SDK and here.

Is there something wrong ?

Your any advice will be appreciated.

Original Attachment has been moved to: dma_peripheral_to_memory.c.zip

Re: ADC multi ch with DMA on KL27

xiangjun_rong — Mon, 16 Oct 2017 04:34:30 GMT

Hi, Shuichiy,

I think the solution is okay to use ADC to trigger DMA_CH0, then use channel link(DMA_CH1) to transfer adctable[] to ADC_SC1A to start another ADC conversion.

I think you have to use debugger to display the DMA register setting, especially DMA_DCR0 reg,the LINKCC bits should be 2b'10, the LCH1 bits should be 2b'01.

Pls paste the DMA register setting so that we can have a review.

Xiangjun Rong

Re: ADC multi ch with DMA on KL27

shuichiy — Mon, 16 Oct 2017 08:31:10 GMT

Thank you for your reply.

I have finally fixed the problem. I needed to change parameters for sc1.

Now, DMA doesn't work again after merging "usb cdc vcom lite" sample into the project but It should be another issue.