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    <title>topic Re: KL27 ADC0 Configuration in VLPR Mode using SDK 2.0? in Kinetis Software Development Kit</title>
    <link>https://community.nxp.com/t5/Kinetis-Software-Development-Kit/KL27-ADC0-Configuration-in-VLPR-Mode-using-SDK-2-0/m-p/597338#M6057</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Turns out...this is all on me. &amp;nbsp;Before entering into a VLPS mode, I de-inited the ADC. Upon return from sleep, I was not re-initializing in my power management module. Hence, the hard fault.&lt;/P&gt;&lt;P&gt;With the re-init, all is well.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 15 Nov 2016 21:09:23 GMT</pubDate>
    <dc:creator>benhouston</dc:creator>
    <dc:date>2016-11-15T21:09:23Z</dc:date>
    <item>
      <title>KL27 ADC0 Configuration in VLPR Mode using SDK 2.0?</title>
      <link>https://community.nxp.com/t5/Kinetis-Software-Development-Kit/KL27-ADC0-Configuration-in-VLPR-Mode-using-SDK-2-0/m-p/597336#M6055</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have an application that brings together TPM demo code to turn on/off LED's and sample ADC to measure battery voltage. The program works fine when in Normal Run mode, however, when I try to use VLPR mode I get a HardFault_Handler exception when trying to configure the ADC Channel.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In VLPR, I have the TPM working fine. &amp;nbsp;Subtle adjustments to the clock source and clock source identifier, but with the ADC setup, I am at a loss.&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Using the default SDK 2.0 adc demo configuration when initializing:&lt;/P&gt;&lt;P&gt;void ADC_HWInit(void){ &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;// init the Internal Voltage Referrence Signal&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;VREF_GetDefaultConfig(&amp;amp;vrefConfigStruct);&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;VREF_Init(VREF, &amp;amp;vrefConfigStruct);&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;// init adc&lt;BR /&gt;/*&lt;BR /&gt; * adc16ConfigStruct.referenceVoltageSource = kADC16_ReferenceVoltageSourceVref;&lt;BR /&gt; * adc16ConfigStruct.clockSource = kADC16_ClockSourceAsynchronousClock;&lt;BR /&gt; * adc16ConfigStruct.enableAsynchronousClock = true;&lt;BR /&gt; * adc16ConfigStruct.clockDivider = kADC16_ClockDivider8;&lt;BR /&gt; * adc16ConfigStruct.resolution = kADC16_ResolutionSE12Bit;&lt;BR /&gt; * adc16ConfigStruct.longSampleMode = kADC16_LongSampleDisabled;&lt;BR /&gt; * adc16ConfigStruct.enableHighSpeed = false;&lt;BR /&gt; * adc16ConfigStruct.enableLowPower = false;&lt;BR /&gt; * adc16ConfigStruct.enableContinuousConversion = false;&lt;BR /&gt; */&lt;BR /&gt; ADC16_GetDefaultConfig(&amp;amp;adc16ConfigStruct);&lt;BR /&gt; ADC16_Init(ADC16_BASE, &amp;amp;adc16ConfigStruct);&lt;BR /&gt; ADC16_EnableHardwareTrigger(ADC16_BASE, false); /* Make sure the software trigger is used. */&lt;/P&gt;&lt;P&gt;#if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) &amp;amp;&amp;amp; FSL_FEATURE_ADC16_HAS_CALIBRATION&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;if (kStatus_Success == ADC16_DoAutoCalibration(ADC16_BASE))&lt;BR /&gt; {&lt;BR /&gt; Console_Printf(BOARD_DEBUG_UART_BASEADDR, "\r\nADC16_DoAutoCalibration() Done.\r\n");&lt;BR /&gt; }&lt;BR /&gt; else&lt;BR /&gt; {&lt;BR /&gt; Console_Printf(BOARD_DEBUG_UART_BASEADDR, "\r\nADC16_DoAutoCalibration() Failed.\r\n");&lt;BR /&gt; //ToDo::save error code and set error transmit flag to report in next packet&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;#endif /* FSL_FEATURE_ADC16_HAS_CALIBRATION */&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;//config channels and interrupt&lt;BR /&gt; adc16ChannelConfigStruct.channelNumber = ADC16_USER_CHANNEL;&lt;BR /&gt; adc16ChannelConfigStruct.enableInterruptOnConversionCompleted = false;&lt;/P&gt;&lt;P&gt;#if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) &amp;amp;&amp;amp; FSL_FEATURE_ADC16_HAS_DIFF_MODE&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;adc16ChannelConfigStruct.enableDifferentialConversion = false;&lt;/P&gt;&lt;P&gt;#endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */&lt;BR /&gt;}&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The hard fault occurs in fsl_adc16.c, when calling&amp;nbsp;ADC16_SetChannelConfig().&lt;/P&gt;&lt;P&gt;void ADC16_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc16_channel_config_t *config)&lt;BR /&gt;{&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;assert(channelGroup &amp;lt; ADC_SC1_COUNT);&lt;BR /&gt; assert(NULL != config);&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;uint32_t sc1 = ADC_SC1_ADCH(config-&amp;gt;channelNumber); /* Set the channel number. */&lt;/P&gt;&lt;P&gt;#if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) &amp;amp;&amp;amp; FSL_FEATURE_ADC16_HAS_DIFF_MODE&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;/* Enable the differential conversion. */&lt;BR /&gt; if (config-&amp;gt;enableDifferentialConversion)&lt;BR /&gt; {&lt;BR /&gt; sc1 |= ADC_SC1_DIFF_MASK;&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;#endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;/* Enable the interrupt when the conversion is done. */&lt;BR /&gt; if (config-&amp;gt;enableInterruptOnConversionCompleted)&lt;BR /&gt; {&lt;BR /&gt; sc1 |= ADC_SC1_AIEN_MASK;&lt;BR /&gt; }&lt;BR /&gt; &lt;SPAN style="font-size: 22px;"&gt;base-&amp;gt;SC1[channelGroup] = sc1;&lt;/SPAN&gt; &lt;SPAN style="font-size: 22px;"&gt;&amp;nbsp;&lt;SPAN style="color: #ff0000;"&gt;&lt;STRONG&gt;// Hard Fault Occurs Here!!!&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Like I said, this works perfectly in Normal Run mode. Not so in VLPR.&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In VLPR, I've tried changing the clock source to the Bus Clock, which uses the system core clock. I've also played with the dividers. &amp;nbsp;In my setup, I am using the default code for clock_config.c when calling BOARD_BootClockVLPR(). &amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any ideas to a path would be greatly appreciated.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Nov 2016 17:51:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Software-Development-Kit/KL27-ADC0-Configuration-in-VLPR-Mode-using-SDK-2-0/m-p/597336#M6055</guid>
      <dc:creator>benhouston</dc:creator>
      <dc:date>2016-11-15T17:51:03Z</dc:date>
    </item>
    <item>
      <title>Re: KL27 ADC0 Configuration in VLPR Mode using SDK 2.0?</title>
      <link>https://community.nxp.com/t5/Kinetis-Software-Development-Kit/KL27-ADC0-Configuration-in-VLPR-Mode-using-SDK-2-0/m-p/597337#M6056</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;By the way, I forgot to mention that Hard Faults like this are most likely due to the clock not being set for the specific module one is trying to write to.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm starting to think that there is a default register config for the ADC0 module to operate under Normal Run mode. &amp;nbsp;The SDK 2.0 may not be setting this and, thus, no interface when using VLPR mode??&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Nov 2016 19:48:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Software-Development-Kit/KL27-ADC0-Configuration-in-VLPR-Mode-using-SDK-2-0/m-p/597337#M6056</guid>
      <dc:creator>benhouston</dc:creator>
      <dc:date>2016-11-15T19:48:18Z</dc:date>
    </item>
    <item>
      <title>Re: KL27 ADC0 Configuration in VLPR Mode using SDK 2.0?</title>
      <link>https://community.nxp.com/t5/Kinetis-Software-Development-Kit/KL27-ADC0-Configuration-in-VLPR-Mode-using-SDK-2-0/m-p/597338#M6057</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Turns out...this is all on me. &amp;nbsp;Before entering into a VLPS mode, I de-inited the ADC. Upon return from sleep, I was not re-initializing in my power management module. Hence, the hard fault.&lt;/P&gt;&lt;P&gt;With the re-init, all is well.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Nov 2016 21:09:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Software-Development-Kit/KL27-ADC0-Configuration-in-VLPR-Mode-using-SDK-2-0/m-p/597338#M6057</guid>
      <dc:creator>benhouston</dc:creator>
      <dc:date>2016-11-15T21:09:23Z</dc:date>
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