topic Re: SPI sck strange behavior in Kinetis Software Development Kit

SPI sck strange behavior

tapiepierre — Mon, 22 Jun 2015 13:23:57 GMT

Hello Freescale community,

I use Kinetis Design studio 2.0.0, MQX KSDK 1.0.0 with Processor expert, (uc MK64F),

I realized SPI communication using SPI0 and two channels DMA for Tx et Rx. I talk with a multiports (ADC,DAC, GPI,GPO) component at 4MHz.

I chose sck non-continuous for the configuration of the SPI

The frame format is 3 bytes : One for CMD, one for data LSB and one for data MSB.

I have a problem with reception of the first bit of each new byte because the sck signal has a strange behavior : the gap between two clock cycle is good but the gap between the 8th bit and the first bit of the next byte is different. You can see the behavior on the following screenshot :

with a zoom we can very well if the clock difference :

What the problem, Can you help me ?

I'am not interresting to use sck continuous mode,

I have found a solution for not having problem reading the first bit of new byte using functions :

static inline void DSPI_HAL_SetModifiedTimingFormatCmd(uint32_t baseAddr, bool enable)

and

static inline void DSPI_HAL_SetDatainSamplepointMode(uint32_t baseAddr,dspi_master_sample_point_t samplePnt) with "kDspiSckToSin_1Clock"

But signal MOSI is modify and I think this is not a properly operation

You can see with this modifications :

Please can you give me some advices to resolve this problem ?

Re: SPI sck strange behavior

Jorge_Gonzalez — Tue, 23 Jun 2015 14:49:55 GMT

Hello PE TAPIE:

If I understand correctly the time between frames is shorter than the time between bits, right?

You can try setting a delay with the API DSPI_DRV_MasterSetDelay(instance, kDspiAfterTransfer, [nanoseconds], & calculatedDelayaftertransfer). In nanoseconds you would set the time to match the time you get between bits.

I hope this helps!

Regards!,
Jorge Gonzalez

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Re: SPI sck strange behavior

tapiepierre — Tue, 23 Jun 2015 15:29:25 GMT

Hello Jorge Gonzalez,

Thanks for your answer,

I have already use this function for apply special delay, but the delay "kDspiAfterTransfer" allow to modify the delays between two activation of the chip select and not between the 8th bit and the first bit of the next byte.

In this image you can see the delay of 400 ns I apply :

But my problem is still present,

you have very well understood my problem : the time between Byte is shorter than the time between bits ,

Please help me ?

Re: SPI sck strange behavior

tapiepierre — Mon, 06 Jul 2015 08:21:46 GMT

Hello,

I found the solution, I use the function DSPI_DRV_MasterSetDelay with argument "kDspiPcsToSck" and I put the little delay I want between each bytes.

Thanks for your help

Regards