Kinetis Software Development Kit中的主题 Re: How to control clock pulse

How to control clock pulse

kiyoshimatsuzak — Thu, 19 Mar 2015 23:58:09 GMT

Hi, all.

I use a FRDM-K64F.

I built "ftm_pwm" in KSDK 1.0.0 using Kinetis Design Studio, and I could get clock output from a FRDM-K64F.

As next step, I would like to control output pulse number to control motors.

For example,

When I need ten pulses:

__|"|_|"|_|"|_|"|_|"|_|"|_|"|_|"|_|"|_|"|______________

When I need three pulses:

__|"|_|"|_|"|_______________________________

I need sample codes and documents about this.

If someone have information, please let me know.

Regards,

Kiyoshi

Re: How to control clock pulse

apanecatl — Mon, 23 Mar 2015 13:35:22 GMT

What I can think of to output a specific number of pulses would be to count the times the Channel Value register (FTMx_CnV) overflows, this counter register provides the pulse width, every time a pulse stops the register overflows and the count is reset to star counting up/down again effectively letting you know a new pulse has started, you just need to know how many times it overflowed to stop the count.

Re: How to control clock pulse

kiyoshimatsuzak — Tue, 24 Mar 2015 01:58:02 GMT

Hi, Pedro

Thank you so much for your advice.

I have some questions.

Q1.

"every time a pulse stops the register overflows and the count is reset"

Can I get a value of FTMx_CnV using FTM_HAL_GetChnCountVal( ) in "ftm_pwm" demo of KDS?

Q2.

"the count is reset"

Do you mean that FTMx_CnV become zero when a pulse stopped every time?

Regards,

Kiyoshi

Re: How to control clock pulse

apanecatl — Tue, 24 Mar 2015 20:06:48 GMT

Well you need to check the reference manual in greater detail:

Q1: Can I get a value of FTMx_CnV using FTM_HAL_GetChnCountVal( ) in "ftm_pwm" demo of KDS?

A: You can get the channel vale at any time, the register has no read restrictions.

Q2: Do you mean that FTMx_CnV become zero when a pulse stopped every time?

A: The channel value resets (reaches 0 or the maximum count value) whenever the counter overflows after reaching its maximum count value, since the counter max value defines the pulse's duty cycle, knowing when the value resets lets you know when a pulse has been sent.