Kinetis Design Studio中的主题 Re: Using KDS generated SetClockConfiguration()

Using KDS generated SetClockConfiguration()

neilhancock — Tue, 21 Oct 2014 18:06:18 GMT

I'd like to be able to use KDS 1.1 to generate ClockConfigurations and change then using SetClockConfiguration() on a Kinetis K20D

KDS Component Inspector-CPU is very powerful - however I'm having trouble stitching it all together and getting the processor to run afterwards, so any comments on methods of using KDS appreciated

The objective is to have 3 power modes (clock configurations)

1) 48MHz clock for USB Otg - Run modem

2) Low Power Run for a simple ADC and data logging to SPI/Flash

3) Low power suspend - timer expire or USB cable plugged in to wake up, or reset - CPU exists in this state 99% of time

I'm using the FRDM-K20D50 to prototype, which has an 8Mhz Xtal and 32KHz RTC Xtal

So in KDS Component Inspector - CPU - its best to increment the "Clock Configuration" first as it offers to create a "Clock Source" settings

CCS0 Clock Config/Settings 0/0 for 48Mhz

CCS1 Clock Config/Settings 1/1 for low power run - can use RTC/IRC Clock

CCS2 Clock Config/Settings 2/2 for lowest power state while being able to periodically wake - disable 8MHz xtal

I have RTC 32Khz Oscillator Enabled

I have System Oscillator 0 - Enabled with External crystal - 8MHz

For CCS0 MCG=PEE from System Oscillator 0, Clock Monitor Enabled

For CCS1 MCG=BLPI from IRC-fast/divider 4 - VLP disabled

For CCS2 MCG=BLPI from IRC-fast/divider 128 - VLP enabled, entry=Auto, sysClock prescalers can be adjusted for runtime cycles v power used

Generally the transitions are going to be PwrUp/Reset--> CCS1 <-->CCS2

CCS1<-->CCS0

I would like to be able to have the UART and internal timer tick adjust automatically between CCS1 and CCS0 - but haven't investigated this yet.

thanks for any comments as to if you think this is a viable way to try KDS 1.1 or anything to watchout for when using the code.

Re: Using KDS generated SetClockConfiguration()

marek_neuzil — Thu, 04 Dec 2014 14:13:14 GMT

Hello,

The setting of all clock configurations, you have defined above, is possible but I have following comments and recomendation:

- If you suppose to use the WAIT, SLEEP or STOP mode as the third power mode (Low power suspend) the third configuration is not necessary. You can use the second clock configuration (Low Power Run) for entering the WAIT, SLEEP or STOP mode. See the document https://community.freescale.com/docs/DOC-102163

When the WAIT, SLEEP or STOP mode is entered the CPU is stopped and interrupt/ reset (depend on the selected mode) wake up the CPU. So you can use the SetOperationMode() method to enter any of these mode.

- The second power mode (Low Power Run) can be used for entering Very Low Power Run mode too (set the property Very low power mode to Enabled and the property VLP mode entry to User. So you would be able switch between the RUn mode and Very Low Power Mode by using VLPModeEnable() and VLPModeDisable() methods.

- the Serial_LDD component allows you to select one baudrate that will remain the same for all clock configurations where the component is enabled. Select the Advance view in the Component Inspector window of the Serial_LDD and open the CPU clokc/configuration selection group of properties, see the screenshot below.

I have also created a simple application with the CPU (I have put all three clock configuration into the project) and Serial_LDD, see the attached file (it runs on the FRDM-K20D50M target board).

Best Regards,

Marek Neuzil

Re: Using KDS generated SetClockConfiguration()

neilhancock — Thu, 04 Dec 2014 17:06:20 GMT

Hello Marek

Excellent thankyou - I will try it.

I have been able to Import->"existing projects into Workspace" and compile it - so this is great.

Good comment/input - I have had the feeling that it could be done - just putting together the right matrix has been tricky.

Re: Using KDS generated SetClockConfiguration()

neilhancock — Mon, 15 Dec 2014 23:06:55 GMT

Thanks Marek.

I tried your examples on a FRDM-K20D50 - and I modified the FRDM-K20D board for low power - and put in some sleep logic, however when running the specified clocking scenario it is taking a couple of mA - so something isn't as isolated and I'm not trying to debug it unless I can find a clear application example for the FRDM-K20D

I did the following

J4 added jumper and removed 0R and 10R resistors for power mesurement

then fed the board with 3.3V through P3V3_K20D50M (J4pin2)

I DID use your example/suggestion to re-architect the clocks on my custom board I've designed - and that appears to reduce the current to about 120uA in STOP mode, and I now have the capability to switch between high speed and low power STOP mode. Thankyou Thankyou

I can live with 120uA quiescent - but if there are any other suggestions for trying to figure out what is consuming the rest of the power, I'd be happy to try them.

Re: Using KDS generated SetClockConfiguration()

DavidS — Tue, 16 Dec 2014 14:21:19 GMT

Hi Neil,

Other things to try are disabling GPIO and/or setting them to a state that doesn't draw power.

Regards,

David