topic Re: ICS in KEA-128 in Kinetis Design Studio

ICS in KEA-128

vigneshbalaji — Mon, 18 Jan 2016 05:57:50 GMT

Hi,

Can anyone say me how to set the ICS module registers for making the system clock run at 24 Mhz in KEA-128?

Re: ICS in KEA-128

ZhangJennie — Mon, 18 Jan 2016 09:31:50 GMT

Hi,

we can use FEI mode to generate 24M bus clock.

with 37.5khz internal clock, ICSOUT can generate 48Mhz output. ICSOUT=37.5k*1280=48Mhz

according to below clock diagram, we can set DIV1 as 1 to divide ICSOUT by 2, thus generated system/core clock is 48/2=24Mhz

thus we can set SIM_CLKDIV=0x11100000.

with above code, system/core clock is 48/2=24Mhz, bus clock=48/2/2=12Mhz. I made a demo under KDS3.0. see attached.

can this help you?

Have a great day,
Jennie Zhang

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Re: ICS in KEA-128

vigneshbalaji — Mon, 18 Jan 2016 17:57:46 GMT

Hi,

Your code is a processor Expert one based on KDS IDE.Can you provide me a register level Example?

I have an example code for ICS module which works at 20Mhz.Can you suggest me what changes I have to do in it?

void Clk_Init()

{

ICS_C1|=ICS_C1_IRCLKEN_MASK; /* Enable the internal reference clock*/

ICS_C3= 0x90; /* Reference clock frequency = 31.25 KHz*/

while(!(ICS_S & ICS_S_LOCK_MASK)); /* Wait for PLL lock, now running at 40 MHz (1280 * 31.25Khz) */

ICS_C2|=ICS_C2_BDIV(1) ; /*BDIV=2, Bus clock = 20 MHz*/

ICS_S |= ICS_S_LOCK_MASK ; /* Clear Loss of lock sticky bit */

}

This is the standard Example given by KEA-128.

I want to make changes in it.

Re: ICS in KEA-128

Carlos_Mendoza — Mon, 18 Jan 2016 23:41:22 GMT

Hi Vignesh,

You can use the same initialization code but removing the following line:

ICS_C3= 0x90; /* Reference clock frequency = 31.25 KHz*/

This way the IRC frequency will be 37.5kHz, which is the factory trimmed frequency, and you will be able to achieve 48MHz as Jennie already mentioned.

ICSOUT=37.5k*1280=48Mhz

Hope it helps!

Best Regards,

Carlos Mendoza

Technical Support Engineer

Re: ICS in KEA-128

ZhangJennie — Tue, 19 Jan 2016 05:56:22 GMT

Hi Vignesh,

in my first response, I set system/core clock by setting DIV1 in SIM module

your code sets system/core clock by setting BDIV in ICS module.

Carlos is correct, you can only remove ICS_C3= 0x90; to get 24M core clock if don't consider clock Trim.

with your code, in FEI mode, FLL output 37.5k*1280=48Mhz

with this code:

ICS_C2|=ICS_C2_BDIV(1) ; // BDIV=divide by 2

ICSOUTCLK = FLL output/2 = 48/2=24Mhz

thus with default SIM_CLKDIV value: DIV1=00, we can get system/core clock = ICSOUTCLK = 24Mhz

can this help you?

Have a great day,
Jennie Zhang

Re: ICS in KEA-128

vigneshbalaji — Tue, 19 Jan 2016 07:31:50 GMT

Hi Carlos,

I am not able to understand about IRC?where does it come from?

I want to know why ICS_OUT is multiplied by 1280 always?

Re: ICS in KEA-128

vigneshbalaji — Tue, 19 Jan 2016 08:39:51 GMT

Thank you jennie.It provides me a basis for my understanding

Re: ICS in KEA-128

vigneshbalaji — Tue, 19 Jan 2016 08:42:40 GMT

I want to know how to set the trim value to vary the IRC between 31.25 kHz to 39 Khz?

I also want to know why IRC can vary between that values only?

Re: ICS in KEA-128

ZhangJennie — Tue, 19 Jan 2016 08:51:39 GMT

there is one good article on this regard:

Yes, OSDA can trim the reference of internal clock source!

Jennie Zhang

Re: ICS in KEA-128

ZhangJennie — Tue, 19 Jan 2016 08:54:05 GMT

this is from user manual:

Jennie Zhang

Re: ICS in KEA-128

ZhangJennie — Tue, 19 Jan 2016 08:59:48 GMT

you are welcome.

Jennie Zhang

Re: ICS in KEA-128

vigneshbalaji — Tue, 19 Jan 2016 09:02:53 GMT

Hi jennie,

I tried accessing the aricle.It is saying unauthorized access.Can you send that article to my mail id?

Re: ICS in KEA-128

ZhangJennie — Tue, 19 Jan 2016 09:07:51 GMT

yes, sent. please check your email box.

Jennie Zhang

Re: ICS in KEA-128

vigneshbalaji — Tue, 19 Jan 2016 12:26:42 GMT

Hi Jennie,

Can you send that document to my mail id.It says I don't have access to it.

Re: ICS in KEA-128

vigneshbalaji — Tue, 19 Jan 2016 12:38:43 GMT

Thank you Jennie :smileyhappy:

Re: ICS in KEA-128

vigneshbalaji — Tue, 19 Jan 2016 12:42:57 GMT

Hi carlos,

I made a small change to the code.After removing the Trim value.I removed the divider also.This is the code

void Clk_Init()

{

ICS_C1|=ICS_C1_IRCLKEN_MASK; /* Enable the internal reference clock*/

while(!(ICS_S & ICS_S_LOCK_MASK)); /* Wait for PLL lock, now running at 40 MHz (1280 * 31.25Khz) */

ICS_S |= ICS_S_LOCK_MASK ; /* Clear Loss of lock sticky bit */

}

I found that the controller is not able to flash again after running this at this clock.

Can you tell me the reason???

Re: ICS in KEA-128

Carlos_Mendoza — Tue, 19 Jan 2016 16:06:11 GMT

Hi Vignesh,

I have tested the same code and the application is working as expected and I had no problem flashing the MCU after this.

Could you post a screenshot of the error you get?

Best Regards!

Carlos Mendoza

Technical Support Engineer

Re: ICS in KEA-128

vigneshbalaji — Wed, 20 Jan 2016 06:01:55 GMT

Hi,

That means you ran the bus clock at 48 Mhz as mine and the MCU did not find any problem.I ran my MCU in debug mode with Segger(internally SWD).Did you run this at the same way.

Re: ICS in KEA-128

ZhangJennie — Mon, 25 Jan 2016 09:46:02 GMT

Hi Vignesh,

i just tested your code on my side there is no error.

normally the error you got is a target connect issue but not because of code itself. to fix it, please check:

1. if you use NXP demo board TPK-KEA128, if no external power supply provided, please make sure J13 connect 1-2

2. not use if the problem is because of your J-link firmware, please use attached JLink_OpenSDA_V2_1_2015-10-13.bin to update the TPK-KEA128 OpenSDA firmware.

3. attached is my testing project and video, I use KDS3.0. please refer.

can this help you?

Have a great day,
Jennie Zhang

Re: ICS in KEA-128

vigneshbalaji — Wed, 25 May 2016 08:22:27 GMT

Hi Zhang,

The article which you shared me was awsome.

So what I want to understand is that

1)Is there any Formula or Calculation For Finding the ICS_C3 value without this work around???