topic Re: DDS implementation with KL25Z in Kinetis Design Studio

DDS implementation with KL25Z

bukitoo — Fri, 16 Oct 2015 00:20:03 GMT

Hi! I have been trying to implement a DDS with the DMA peripheral of a KL25Z.

The basic Idea is to transfer one period of my signal without CPU intervention to a single memory location (DAC output register), periodically. THe sample time is commanded by the PIT tick.

I could do it by reloading the DMA configuration in each period, within the DMA IRQ handler but I have the problem of the IRQ handler processing latency, so I was thinking a way of workarround that behavior.

Then I tried to use a second DMA channel, linked with the first one, to transfer the configuration for the 1rst channel when the signal period expired. But I could make it work. Is that possible to do?

The idea is to have all the DDS process without CPU intervention.

Any tip will be apreciated.

I have found many examples using the eDMA module (from another kinetis cpus) but s few for the DMA module of the KL25z one.

Thanks!

Franco

Re: DDS implementation with KL25Z

Alice_Yang — Fri, 16 Oct 2015 02:56:46 GMT

Hello Franco,

Yes , you can use two DMA channels for DAC converter .

1. The DAC conversion complete flag requests a DMA transfer for channel 1.

2. The channel 1 transfer finishes and the resulting value is transferred to the SRAM buffer.

3. Since channel 1 is linked to channel 0, the channel 1 finish requests a transfer start on channel 0.

There is a sample code (AN4590)about kineits K series , the DMA have some difference with KL25, while the process we can refer to .

Search Results: AN4590

Hope it helps

Have a great day,
Alice

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