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    <title>topic Re: Flexbus problem in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270391#M9124</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dennis,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think it should be a timing issue, please try use | FB_CSCR_ASET(0x3) instead to see if it makes any difference.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please kindly let me know if the problem is still there.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 28 Mar 2014 02:45:56 GMT</pubDate>
    <dc:creator>Kan_Li</dc:creator>
    <dc:date>2014-03-28T02:45:56Z</dc:date>
    <item>
      <title>Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270384#M9117</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a custom board using a MK10FN1M0VLQ12. I have a 512K 16 bit Flash connected to the Flexbus. When I try to access the flash I get the following error "Target request failed: ARM GDI Protocol Adapter: Stop failed. non fatal error.". What would cause this error?&amp;nbsp; I am using a P&amp;amp;E multi-link bdm. Also I have the K10 address 1 connected to Address 0 of the flash for 16 bit access.&amp;nbsp; Is this correct? &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 03 Mar 2014 01:18:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270384#M9117</guid>
      <dc:creator>c393</dc:creator>
      <dc:date>2014-03-03T01:18:20Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270385#M9118</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dennis,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Would you please provide details on that issue? For example, the schematics of flexbus connection, the code to initialize the flexbus, and which instruction causing the issue you mentioned? Thanks for your patience!!&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Mar 2014 03:55:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270385#M9118</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2014-03-05T03:55:21Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270386#M9119</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="flexbus.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/43028i1702DE586EAA7D18/image-size/large?v=v2&amp;amp;px=999" role="button" title="flexbus.jpg" alt="flexbus.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/*********************************************************************** &lt;BR /&gt; * &lt;BR /&gt; * Function: FlexBus_Init&lt;BR /&gt; * &lt;BR /&gt; * Purpose: &lt;BR /&gt; *&amp;nbsp; configure the flex bus to access external flash&lt;BR /&gt; * &lt;BR /&gt; * Processing: &lt;BR /&gt; *&amp;nbsp; clears all ring attributes.&lt;BR /&gt; *&lt;BR /&gt; * Parameters: &lt;BR /&gt; *&amp;nbsp; ring: ring buffer id&lt;BR /&gt; * &lt;BR /&gt; * Outputs: None&lt;BR /&gt; * &lt;BR /&gt; * Returns: None&lt;BR /&gt; * &lt;BR /&gt; * Notes: None&lt;BR /&gt; * &lt;BR /&gt; **********************************************************************/&lt;BR /&gt;void Flexbus_Init(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Enable the clock to the FlexBus module &lt;/P&gt;&lt;P&gt; FB_CSAR0 = (uint32)&amp;amp;EX_FLASH_START_ADDRESS;&amp;nbsp;&amp;nbsp;&amp;nbsp; // 0x60000000&lt;BR /&gt; FB_CSCR0&amp;nbsp; =&amp;nbsp;&amp;nbsp; FB_CSCR_PS(2)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // 16-bit port&lt;BR /&gt; //&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_AA_MASK&amp;nbsp;&amp;nbsp;&amp;nbsp; // auto-acknowledge&lt;BR /&gt; //&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_EXTS_MASK&amp;nbsp; // ALE asserted thoughtout cycle&lt;BR /&gt; //&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_ASET(0x1)&amp;nbsp; // assert chip select on second clock edge after address is asserted&lt;BR /&gt; //&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_WS(0x1)&amp;nbsp;&amp;nbsp;&amp;nbsp; // 1 wait state - may need a wait state depending on the bus speed &lt;BR /&gt; //&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_BEM_MASK // Byte enable enabled&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;&lt;/P&gt;&lt;P&gt; FB_CSMR0&amp;nbsp; =&amp;nbsp;&amp;nbsp; FB_CSMR_BAM(7)&amp;nbsp; //Set base address mask for 2M address space&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSMR_V_MASK&amp;nbsp;&amp;nbsp;&amp;nbsp; //Enable cs signal&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;&lt;BR /&gt; //enable BE signals - note, not used in this example&lt;BR /&gt;// FB_CSPMCR = 0x02200000;&lt;/P&gt;&lt;P&gt; //fb clock divider 3&lt;BR /&gt;// SIM_CLKDIV1 |= SIM_CLKDIV1_OUTDIV3(0x3);&lt;/P&gt;&lt;P&gt;// configure external pins&lt;BR /&gt; PORTD_PCR6 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 0&lt;BR /&gt; PORTD_PCR5 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 1&lt;BR /&gt; PORTD_PCR4 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 2&lt;BR /&gt; PORTD_PCR3 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 3&lt;BR /&gt; PORTD_PCR2 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 4&lt;BR /&gt; PORTC_PCR10 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 5&lt;BR /&gt; PORTC_PCR9 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 6&lt;BR /&gt; PORTC_PCR8 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 7&lt;BR /&gt; PORTC_PCR7 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 8&lt;BR /&gt; PORTC_PCR6 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 9&lt;BR /&gt; PORTC_PCR5 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 10&lt;BR /&gt; PORTC_PCR4 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 11&lt;BR /&gt; PORTC_PCR2 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 12&lt;BR /&gt; PORTC_PCR1 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 13&lt;BR /&gt; PORTC_PCR0 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 14&lt;BR /&gt; PORTB_PCR18 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 15&lt;BR /&gt; PORTB_PCR17 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 16&lt;BR /&gt; PORTB_PCR16 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 17&lt;BR /&gt; PORTB_PCR11 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 18&lt;BR /&gt; PORTB_PCR10 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 19&lt;BR /&gt; PORTB_PCR9 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 20&lt;BR /&gt; PORTB_PCR8 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 21&lt;BR /&gt; PORTB_PCR7 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 22&lt;BR /&gt; PORTB_PCR6 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 23&lt;BR /&gt; PORTA_PCR29 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 24&lt;BR /&gt; PORTA_PCR28 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 25&lt;BR /&gt; PORTA_PCR27 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 26&lt;BR /&gt; PORTA_PCR26 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 27&lt;BR /&gt; PORTA_PCR25 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 28&lt;BR /&gt; PORTA_PCR24 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 29&lt;BR /&gt; PORTB_PCR21 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 30&lt;BR /&gt; PORTB_PCR20 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 31&lt;BR /&gt; PORTB_PCR19 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // OEN&lt;BR /&gt; PORTC_PCR11 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // R/W&lt;BR /&gt; PORTD_PCR0 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // ALE&lt;BR /&gt; PORTD_PCR1 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // CS&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kan the issue is cause when I try to read location 0x60000000.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank-you for the reply.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 02:05:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270386#M9119</guid>
      <dc:creator>c393</dc:creator>
      <dc:date>2014-03-07T02:05:00Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270387#M9120</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dennis,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It looks like you comment out AA bit configuration.&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;FB_CSCR0&amp;nbsp; =&amp;nbsp; FB_CSCR_PS(2) &lt;/TD&gt;&lt;TD&gt;// 16-bit port&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;//&amp;nbsp;&amp;nbsp; &lt;/TD&gt;&lt;TD&gt;| FB_CSCR_AA_MASK&lt;/TD&gt;&lt;TD&gt;// auto-acknowledge&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;//&lt;/TD&gt;&lt;TD&gt;| FB_CSCR_EXTS_MASK&amp;nbsp; // ALE asserted thoughtout cycle&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;//&lt;/TD&gt;&lt;TD&gt;| FB_CSCR_ASET(0x1)&amp;nbsp; // assert chip select on second clock edge after address is asserted&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;//&lt;/TD&gt;&lt;TD&gt;| FB_CSCR_WS(0x1)&lt;/TD&gt;&lt;TD&gt;// 1 wait state - may need a wait state depending on the bus speed&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;//&lt;/TD&gt;&lt;TD&gt;| FB_CSCR_BEM_MASK // Byte enable enabled&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;and I didnt see the FB_TA is connecting with the external flash device, so that would cause problem during read operation as bus hangs during a transfer. Please enable this bit and try again.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your patience!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 08:05:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270387#M9120</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2014-03-07T08:05:18Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270388#M9121</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kan,&lt;/P&gt;&lt;P&gt;Thank-you for the Reply. I am not getting an error, but when I do a 16 bit I get back 0xC0FF when it should be 0xFFFF.&lt;/P&gt;&lt;P&gt;Thank-you&lt;/P&gt;&lt;P&gt;Dennis Essenmacher&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Mar 2014 00:53:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270388#M9121</guid>
      <dc:creator>c393</dc:creator>
      <dc:date>2014-03-24T00:53:14Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270389#M9122</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dennis,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Did you change the Flexbus_Init()? If yes, please post it here for a review. Thanks for your patience!&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Mar 2014 03:16:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270389#M9122</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2014-03-24T03:16:27Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270390#M9123</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void Flexbus_Init(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Enable the clock to the FlexBus module &lt;/P&gt;&lt;P&gt; FB_CSAR0 = (uint32)&amp;amp;EX_FLASH_START_ADDRESS;&amp;nbsp;&amp;nbsp;&amp;nbsp; // 0x60000000&lt;BR /&gt; FB_CSCR0&amp;nbsp; =&amp;nbsp;&amp;nbsp; FB_CSCR_PS(3)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // 16-bit port&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_AA_MASK&amp;nbsp;&amp;nbsp;&amp;nbsp; // auto-acknowledge&lt;BR /&gt; //&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_EXTS_MASK&amp;nbsp; // ALE asserted thoughtout cycle&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_ASET(0x1)&amp;nbsp; // assert chip select on second clock edge after address is asserted&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_WS(0x3)&amp;nbsp;&amp;nbsp;&amp;nbsp; // 1 wait state - may need a wait state depending on the bus speed &lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_RDAH(1)&lt;BR /&gt; //&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSCR_BEM_MASK // Byte enable enabled&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;&lt;/P&gt;&lt;P&gt; FB_CSMR0&amp;nbsp; =&amp;nbsp;&amp;nbsp; FB_CSMR_BAM(7)&amp;nbsp; //Set base address mask for 2M address space&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; | FB_CSMR_V_MASK&amp;nbsp;&amp;nbsp;&amp;nbsp; //Enable cs signal&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ;&lt;BR /&gt; //enable BE signals - note, not used in this example&lt;BR /&gt;// FB_CSPMCR = 0x02200000;&lt;/P&gt;&lt;P&gt; //fb clock divider 3&lt;BR /&gt;// SIM_CLKDIV1 |= SIM_CLKDIV1_OUTDIV3(0x3);&lt;/P&gt;&lt;P&gt;// configure external pins&lt;BR /&gt;// PORTD_PCR6 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 0&lt;BR /&gt; PORTD_PCR5 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 1&lt;BR /&gt; PORTD_PCR4 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 2&lt;BR /&gt; PORTD_PCR3 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 3&lt;BR /&gt; PORTD_PCR2 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 4&lt;BR /&gt; PORTC_PCR10 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 5&lt;BR /&gt; PORTC_PCR9 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 6&lt;BR /&gt; PORTC_PCR8 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 7&lt;BR /&gt; PORTC_PCR7 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 8&lt;BR /&gt; PORTC_PCR6 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 9&lt;BR /&gt; PORTC_PCR5 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 10&lt;BR /&gt; PORTC_PCR4 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 11&lt;BR /&gt; PORTC_PCR2 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 12&lt;BR /&gt; PORTC_PCR1 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 13&lt;BR /&gt; PORTC_PCR0 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 14&lt;BR /&gt; PORTB_PCR18 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 15&lt;BR /&gt; PORTB_PCR17 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 16&lt;BR /&gt; PORTB_PCR16 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 17&lt;BR /&gt; PORTB_PCR11 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 18&lt;BR /&gt; PORTB_PCR10 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 19&lt;BR /&gt; PORTB_PCR9 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 20&lt;BR /&gt; PORTB_PCR8 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 21&lt;BR /&gt; PORTB_PCR7 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 22&lt;BR /&gt; PORTB_PCR6 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 23&lt;BR /&gt; PORTA_PCR29 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 24&lt;BR /&gt; PORTA_PCR28 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 25&lt;BR /&gt; PORTA_PCR27 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 26&lt;BR /&gt; PORTA_PCR26 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 27&lt;BR /&gt; PORTA_PCR25 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 28&lt;BR /&gt; PORTA_PCR24 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 29&lt;BR /&gt; PORTB_PCR21 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 30&lt;BR /&gt; PORTB_PCR20 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // address/data 31&lt;BR /&gt; PORTB_PCR19 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // OEN&lt;BR /&gt; PORTC_PCR11 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // R/W&lt;BR /&gt; PORTD_PCR0 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // ALE&lt;BR /&gt; PORTD_PCR1 = PORT_PCR_MUX(5);&amp;nbsp;&amp;nbsp; // CS&lt;/P&gt;&lt;P&gt;} &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank-you for the reply.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Mar 2014 01:08:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270390#M9123</guid>
      <dc:creator>c393</dc:creator>
      <dc:date>2014-03-27T01:08:09Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270391#M9124</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dennis,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think it should be a timing issue, please try use | FB_CSCR_ASET(0x3) instead to see if it makes any difference.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please kindly let me know if the problem is still there.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Mar 2014 02:45:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270391#M9124</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2014-03-28T02:45:56Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270392#M9125</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&amp;nbsp; I am getting this same error on Kinetis_MK20DX256VLL7_msd_mfs_generic_host (from USB 4.1.1 stack ) when I am in debug mode and I press "stop" on the project. I am using CodeWarrior 10.6, Windows XP. I am using the TWR-K20D72M.&lt;/P&gt;&lt;P&gt;Any updates on this? Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Aug 2014 20:23:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270392#M9125</guid>
      <dc:creator>rhana</dc:creator>
      <dc:date>2014-08-12T20:23:10Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270393#M9126</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Robert,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Actually I run the CW project well without meeting such issue, but I found it generates hard fault when it tried to send out the setup packet, maybe that is the issue you met. I will continue to debug and let you know when I have any progress.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;B.R&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Aug 2014 06:20:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270393#M9126</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2014-08-14T06:20:43Z</dc:date>
    </item>
    <item>
      <title>Re: Flexbus problem</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270394#M9127</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Robert,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I found some code issue in that project, in khci_kinetis.c, you will find a definition for bdt like following:&lt;/P&gt;&lt;P&gt;/* Global variables */&lt;/P&gt;&lt;P&gt;#define _BDT_RESERVED_SECTION_&lt;/P&gt;&lt;P&gt;#if(defined _BDT_RESERVED_SECTION_)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #ifdef __CWCC__&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; #pragma define_section usb_bdt ".usb_bdt" RW&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; __declspec(usb_bdt) uint_8 uint_8_ptr bdt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You have to change it as below:&lt;/P&gt;&lt;P&gt;/* Global variables */&lt;/P&gt;&lt;P&gt;#define _BDT_RESERVED_SECTION_&lt;/P&gt;&lt;P&gt;#if(defined _BDT_RESERVED_SECTION_)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #ifdef __CWCC__&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; #pragma define_section usb_bdt ".usb_bdt" RW&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; __declspec(usb_bdt) uint_8 bdt[512];//uint_8_ptr bdt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;With this modification, you can make it run as expected, and the following is the test result at my end. Please kindly refer to it for more details.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;FAT demo&lt;/P&gt;&lt;P&gt;Waiting for USB mass storage to be attached...&lt;/P&gt;&lt;P&gt;Mass Storage Device Attached&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;******************************************************************************&lt;/P&gt;&lt;P&gt;*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; FATfs DEMO&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *&lt;/P&gt;&lt;P&gt;*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Configuration:&amp;nbsp; LNF Enabled, Code page&amp;nbsp; =1258&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;******************************************************************************&lt;/P&gt;&lt;P&gt;******************************************************************************&lt;/P&gt;&lt;P&gt;*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DRIVER OPERATION&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *&lt;/P&gt;&lt;P&gt;******************************************************************************&lt;/P&gt;&lt;P&gt;1. Demo function: f_mount&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Initializing logical drive 0...&lt;/P&gt;&lt;P&gt;&amp;nbsp; Initialization complete&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. Demo functions:f_getfree, f_opendir, f_readdir&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;getting drive 0 attributes...............&lt;/P&gt;&lt;P&gt;Logical drive 0 attributes:&lt;/P&gt;&lt;P&gt;FAT type = FAT16&lt;/P&gt;&lt;P&gt;Bytes/Cluster = 2048&lt;/P&gt;&lt;P&gt;Number of FATs = 2&lt;/P&gt;&lt;P&gt;Root DIR entries = 512&lt;/P&gt;&lt;P&gt;Sectors/FAT = 250&lt;/P&gt;&lt;P&gt;Number of clusters = 63858&lt;/P&gt;&lt;P&gt;FAT start (lba) = 36&lt;/P&gt;&lt;P&gt;DIR start (lba,clustor) = 536&lt;/P&gt;&lt;P&gt;Data start (lba) = 568&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;127716 KB total disk space.&lt;/P&gt;&lt;P&gt;127624 KB available.&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;******************************************************************************&lt;/P&gt;&lt;P&gt;*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DRECTORY OPERATION&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *&lt;/P&gt;&lt;P&gt;******************************************************************************&lt;/P&gt;&lt;P&gt;1. Demo functions:f_opendir, f_readdir&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Directory listing...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ----A 2014/04/16 17:25&amp;nbsp;&amp;nbsp;&amp;nbsp; 32253&amp;nbsp; tek00000.png&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ----A 2014/04/16 17:34&amp;nbsp;&amp;nbsp;&amp;nbsp; 31451&amp;nbsp; tek00001.png&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ----A 2014/07/04 14:57&amp;nbsp;&amp;nbsp;&amp;nbsp; 20549&amp;nbsp; tek00002.png&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DR--- 2010/12/25 23:30&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; DIRECT~1&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; DIRECT~2&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 3&amp;nbsp;&amp;nbsp;&amp;nbsp; File(s),&amp;nbsp;&amp;nbsp;&amp;nbsp; 84253 bytes total&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2&amp;nbsp;&amp;nbsp;&amp;nbsp; Dir(s)&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. Demo functions:f_mkdir&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.0. Create &amp;lt;Directory_1&amp;gt;&lt;/P&gt;&lt;P&gt;2.1. Create &amp;lt;Directory_2&amp;gt;&lt;/P&gt;&lt;P&gt;2.2. Create &amp;lt;Sub1&amp;gt; as a sub directory of &amp;lt;Directory_1&amp;gt;&lt;/P&gt;&lt;P&gt;2.3. Directory list&lt;/P&gt;&lt;P&gt;Directory listing...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ----A 2014/04/16 17:25&amp;nbsp;&amp;nbsp;&amp;nbsp; 32253&amp;nbsp; tek00000.png&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ----A 2014/04/16 17:34&amp;nbsp;&amp;nbsp;&amp;nbsp; 31451&amp;nbsp; tek00001.png&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ----A 2014/07/04 14:57&amp;nbsp;&amp;nbsp;&amp;nbsp; 20549&amp;nbsp; tek00002.png&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DR--- 2010/12/25 23:30&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; DIRECT~1&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; DIRECT~2&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 3&amp;nbsp;&amp;nbsp;&amp;nbsp; File(s),&amp;nbsp;&amp;nbsp;&amp;nbsp; 84253 bytes total&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2&amp;nbsp;&amp;nbsp;&amp;nbsp; Dir(s)&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3. Demo functions:f_getcwd, f_chdir&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3.0. Get the current directory&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; CWD: 0:/&lt;/P&gt;&lt;P&gt;3.1. Change current directory to &amp;lt;Directory_1&amp;gt;&lt;/P&gt;&lt;P&gt;3.2. Directory listing&lt;/P&gt;&lt;P&gt;Directory listing...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; .&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; ..&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; sub1&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp;&amp;nbsp;&amp;nbsp; File(s),&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 bytes total&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 3&amp;nbsp;&amp;nbsp;&amp;nbsp; Dir(s)&lt;/P&gt;&lt;P&gt;3.3. Get the current directory&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; CWD: 0:/Directory_1&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;4. Demo functions:f_stat(File status), f_chmod, f_utime&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;4.1. Get directory information of &amp;lt;Directory_1&amp;gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DR--- 2010/12/25 23:30&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; Directory_1&lt;/P&gt;&lt;P&gt;4.2&amp;nbsp; Change the timestamp of Directory_1 to 12.25.2010: 23h 30' 20&lt;/P&gt;&lt;P&gt;4.3. Set Read Only Attribute to Directory_1&lt;/P&gt;&lt;P&gt;4.4. Get directory information (Directory_1)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DR--- 2010/12/25 23:30&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; Directory_1&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;5. Demo functions:f_rename&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Rename &amp;lt;sub1&amp;gt; to &amp;lt;sub1_renamed&amp;gt; and move it to &amp;lt;Directory_2&amp;gt;&lt;/P&gt;&lt;P&gt;Directory listing...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; .&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; ..&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---A 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; SUB1_R~1&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp;&amp;nbsp;&amp;nbsp; File(s),&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 bytes total&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 3&amp;nbsp;&amp;nbsp;&amp;nbsp; Dir(s)&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;6. Demo functions:f_unlink&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Delete Directory_1/sub1_renamed&lt;/P&gt;&lt;P&gt;Directory listing...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; .&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; ..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp;&amp;nbsp;&amp;nbsp; File(s),&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 bytes total&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2&amp;nbsp;&amp;nbsp;&amp;nbsp; Dir(s)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;******************************************************************************&lt;/P&gt;&lt;P&gt;*&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; FILE OPERATION&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *&lt;/P&gt;&lt;P&gt;******************************************************************************&lt;/P&gt;&lt;P&gt;1. Demo functions:f_open,f_write, f_printf, f_putc, f_puts, fclose&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1.0. Create new file &amp;lt;New_File_1&amp;gt; (f_open)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; File size =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&lt;/P&gt;&lt;P&gt;1.1. Write data to &amp;lt;New_File_1&amp;gt;(f_write)&lt;/P&gt;&lt;P&gt;1.2. Flush cached data&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; File size =&amp;nbsp; 52&lt;/P&gt;&lt;P&gt;1.3. Write data to &amp;lt;New_File_1&amp;gt; (f_printf)&lt;/P&gt;&lt;P&gt;1.4. Flush cached data&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; File size =&amp;nbsp; 103&lt;/P&gt;&lt;P&gt;1.5. Write data to &amp;lt;New_File_1&amp;gt; (f_puts)&lt;/P&gt;&lt;P&gt;1.6. Flush cached data&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; File size =&amp;nbsp; 152&lt;/P&gt;&lt;P&gt;1.7. Write data to &amp;lt;New_File_1&amp;gt; uses f_putc function&lt;/P&gt;&lt;P&gt;1.8. Flush cached data&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; File size =&amp;nbsp; 199&lt;/P&gt;&lt;P&gt;1.9. Close file &amp;lt;New_File_1&amp;gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. Demo functions:f_open,f_read, f_seek, f_gets, f_close&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.0. Open &amp;lt;New_File_1&amp;gt; to read (f_open)&lt;/P&gt;&lt;P&gt;2.1. Get a string from file (f_gets)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Line 1: Write data to&amp;nbsp; file uses f_write function&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.2. Get the rest of file content (f_read)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Line 2: Write data to file uses f_printf function&lt;/P&gt;&lt;P&gt;Line 3: Write data to file uses f_puts function&lt;/P&gt;&lt;P&gt;Line 4: Write data to file uses f_putc functionûöF¬&lt;/P&gt;&lt;P&gt;&amp;#143;â•:7Rz}™ yzjw8 ¸×áÀ—»ÃÐ ¹òÍ­&lt;/P&gt;&lt;P&gt;ä‹Hïk¨Wã½c' ²7këÞÑ%VrC×»Ô¼ÒSÈÑèR+NjD¡¾òû&amp;gt;ú3‰SËþo ^ÎI Pë±ñ‰þ/Directory_1 &lt;/P&gt;&lt;P&gt;2.3. Close file (f_close)&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3. Demo functions:f_stat, f_utime, f_chmod&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3.1. Get&amp;nbsp; information of &amp;lt;New_File_1&amp;gt; file (f_stat)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ----A 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 199&amp;nbsp; New_File_1.dat&lt;/P&gt;&lt;P&gt;3.2&amp;nbsp; Change the timestamp of Directory_1 to 12.25.2010: 23h 30' 20 (f_utime)&lt;/P&gt;&lt;P&gt;3.3. Set Read Only Attribute to &amp;lt;New_File_1&amp;gt; (f_chmod)&lt;/P&gt;&lt;P&gt;3.4. Get directory information of &amp;lt;New_File_1&amp;gt; (f_stat)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; -R--A 2010/12/25 23:30&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 199&amp;nbsp; New_File_1.dat&lt;/P&gt;&lt;P&gt;3.5. Clear Read Only Attribute of &amp;lt;New_File_1&amp;gt; (f_chmod)&lt;/P&gt;&lt;P&gt;3.6. Get directory information of &amp;lt;New_File_1&amp;gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ----A 2010/12/25 23:30&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 199&amp;nbsp; New_File_1.dat&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;4. Demo functions:f_ulink&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Rename &amp;lt;New_File_1.dat&amp;gt; to&amp;nbsp; &amp;lt;File_Renamed.txt&amp;gt;&lt;/P&gt;&lt;P&gt;Directory listing...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; .&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; ..&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ----A 2010/12/25 23:30&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 199&amp;nbsp; FILE_R~1.TXT&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1&amp;nbsp;&amp;nbsp;&amp;nbsp; File(s),&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 199 bytes total&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2&amp;nbsp;&amp;nbsp;&amp;nbsp; Dir(s)&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;5. Demo functions:f_truncate&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Truncate file &amp;lt;File_Renamed.txt&amp;gt;&lt;/P&gt;&lt;P&gt;5.0. Open &amp;lt;File_Renamed.txt&amp;gt; to write&lt;/P&gt;&lt;P&gt;5.1. Seek file pointer&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Current file pointer:&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; File pointer after seeking:&amp;nbsp; 102&lt;/P&gt;&lt;P&gt;5.2. Truncate file&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; File size =&amp;nbsp; 102&lt;/P&gt;&lt;P&gt;5.3. Close file&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;6. Demo functions:f_forward&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;6.0. Open &amp;lt;File_Renamed.txt&amp;gt; to read&lt;/P&gt;&lt;P&gt;6.1. Forward file to terminal&lt;/P&gt;&lt;P&gt;Line 1: Write data to&amp;nbsp; file uses f_write function&lt;/P&gt;&lt;P&gt;Line 2: Write data to file uses f_printf function&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;6.2. Close file&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;7. Demo functions:f_ulink&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Delete &amp;lt;File_Renamed.txt&amp;gt;&lt;/P&gt;&lt;P&gt;Directory listing...&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; .&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; D---- 2010/01/01 00:00&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp; ..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0&amp;nbsp;&amp;nbsp;&amp;nbsp; File(s),&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0 bytes total&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2&amp;nbsp;&amp;nbsp;&amp;nbsp; Dir(s)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;*------------------------------&amp;nbsp; DEMO COMPLETED&amp;nbsp;&amp;nbsp;&amp;nbsp; ------------------------ *&lt;/P&gt;&lt;P&gt;******************************************************************************&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope that helps,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;B.R&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Aug 2014 06:27:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Flexbus-problem/m-p/270394#M9127</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2014-08-14T06:27:50Z</dc:date>
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