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    <title>topic Re: MKL04Z8VLC4 programming in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267049#M8752</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I get a successful result from erasing the chip but I get an error returned when programming.&amp;nbsp; I have added the log messages below.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks, Joe.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;GDI: DiMeeDisconnect(exec_env_id = 1)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiGdiClose()&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;=== CodeWarrior GDI protocol log ===&lt;/P&gt;&lt;P&gt;GDI DLL: C:\Freescale\CW MCU v10.4\MCU\bin\Plugins\Debugger\protocols\..\..\support\arm\gdi\arm_pne_gdi.dll&lt;/P&gt;&lt;P&gt;CPU: KL04Z8M4&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;GDI: DiGdiOpen()&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiGdiGetFeatures()&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Identification: ARM Cortex M4 P&amp;amp;E to GDI wrapper, Version: 1.0.1, MeeAvailable: true, NrCpusAvailable: 1&lt;/P&gt;&lt;P&gt;GDI: DiGdiAddCallBack(cb_type = 0x4000)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiGdiInitIO()&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_SETMEEID, 1) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : CWDBG, Entry : LaunchConfiguration, Value : KL04_Test_FLASH_PnE U-MultiLink, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DO_DEBUG_OUTPUT, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DEPENDENCY_CHECK, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : UUID, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : CWDBG, Entry : Processor, Value : KL04Z8M4, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : ERASE_PROGRAM_WITHOUT_ASKING, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : AUTO_SYNC, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DOTRIM, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : CURRENT_ALGORITHM_INDEX, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE1_START, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE1_END, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE1_ACTIVE, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE2_START, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE2_END, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE2_ACTIVE, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE3_START, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE3_END, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE3_ACTIVE, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : KL04Z8M4, Entry : PRESERVE_EEPROM_START, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : KL04Z8M4, Entry : PRESERVE_EEPROM_END, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : KL04Z8M4, Entry : PRESERVE_EEPROM, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : ALTERNATIVE_ALGORITHM_PATH, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : ALTERNATIVE_ALGORITHM_CHECKBOX, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PARTITION_PARAM, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DO_PARTITIONING, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : CUSTOM_TRIM, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : KL04Z8M4, Entry : TRIM_VALUE, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : NGS_TRIM_OVERRIDE_REFERENCE_FREQUENCY, Value : 3276800, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : ENABLE_FLASH_PROGRAMMING_DIALOG, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : SPECIFY_NETWORKCARD_ENABLED, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : IO_DELAY_CNT, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP12, Entry : show_hstep_assembly_details, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : CWDBG, Entry : Connect, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : eclipse_show_connection_assistant, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_FX, Value : 4, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_NORMAL, Value : 9, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_OSJTAG, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_CYCLONE, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_TRACELINK, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_LIGHTNING, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_OPENSDA, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : RESET_DELAY, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : PORT, Value : 21, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : interface_selection, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PORT, Entry : IP, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : USE_CYCLONEPRO_RELAYS, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CyclonePro_poweroffonexit, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CyclonePro_currentvoltage, Value : 128, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CyclonePro_PowerDownDelay, Value : 250, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CyclonePro_PowerUpDelay, Value : 250, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : Multilink_PowerUpDelay, Value : 1000, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : Multilink_PowerDownDelay, Value : 250, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FORCE_MASS_ERASE, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : USE_SWD, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : TraceLink_MaxBufferSize, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CPUTARGETTYPENAME, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;INF: P&amp;amp;E Interface detected - Flash Version 6.10&lt;/P&gt;&lt;P&gt;INF: Device is KL04Z8M4.&lt;/P&gt;&lt;P&gt;INF: Mode is In-Circuit Debug.&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMeeConnect(exec_env_id = 1)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiExecResetChild()&lt;/P&gt;&lt;P&gt;INF: CPU reset by debugger.&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiExecGetStatus(cpu_status = (cause = GDI_WAIT_MISCELLANEOUS, brkpt_id = 0, reason = unknown state))&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(PC (id:0xF))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: PC (id:0xF) -&amp;gt; 0x9F4&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(SP (id:0xD))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: SP (id:0xD) -&amp;gt; 0x20000300&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(LR (id:0xE))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: LR (id:0xE) -&amp;gt; 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Executing Initialization File: C:\Documents and Settings\Lab\workspace.10.4\KL04_Test/Project_Settings/Debugger/init_kinetis.tcl&lt;/P&gt;&lt;P&gt;radix x&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config hexprefix 0x&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config MemIdentifier p&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config MemWidth 32&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config MemAccess 32&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(XPSR (id:0x10))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: XPSR (id:0x10) -&amp;gt; 0x21000000&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0x900, space = 4, mem_items = 64, size = 4)&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config MemSwap off&lt;/P&gt;&lt;P&gt;cmdwin::reg User\/System Mode Registers/LR = 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0xE000ED30, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: 0B 00 00 00&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE000ED30, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 02 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiRegisterWrite(LR (id:0xE), value = 0xFFFFFFFF)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(LR (id:0xE))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: LR (id:0xE) -&amp;gt; 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(LR (id:0xE))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: LR (id:0xE) -&amp;gt; 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(SP (id:0xD))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: SP (id:0xD) -&amp;gt; 0x20000300&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(LR (id:0xE))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: LR (id:0xE) -&amp;gt; 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;thread break: Stopped, 0x0, 0x0, cpuARMLittle, KL04_Test.elf (state, tid, pid, cpu, target)&lt;/P&gt;&lt;P&gt;cmdwin::reg Breakpoint Unit Registers/BP_COMP0 = 0x0&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE0002008, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;cmdwin::reg Breakpoint Unit Registers/BP_COMP1 = 0x0&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE000200C, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;cmdwin::reg Core Debug Registers/DEMCR = 0x1000001&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE000EDFC, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 01 00 00 01&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_FUNCTION0 = 0x0&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE0001028, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_FUNCTION1 = 0x0&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE0001038, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryDownload(StartDownload)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0x0, space = 4, mem_items = 48, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 03 00 20 F5 09 00 00 95 05 00 00 A1 05 00 00 AD 05 00 00 B9 05 00 00 C5 05 00 00 D1 05 00 00&lt;/P&gt;&lt;P&gt;GDI: DD 05 00 00 E9 05 00 00 F5 05 00 00 01 06 00 00 0D 06 00 00 19 06 00 00 25 06 00 00 31 06 00 00&lt;/P&gt;&lt;P&gt;GDI: 3D 06 00 00 49 06 00 00 55 06 00 00 61 06 00 00 6D 06 00 00 79 06 00 00 85 06 00 00 91 06 00 00&lt;/P&gt;&lt;P&gt;GDI: 9D 06 00 00 A9 06 00 00 B5 06 00 00 C1 06 00 00 CD 06 00 00 D9 06 00 00 E5 06 00 00 F1 06 00 00&lt;/P&gt;&lt;P&gt;GDI: FD 06 00 00 09 07 00 00 15 07 00 00 21 07 00 00 2D 07 00 00 39 07 00 00 F1 04 00 00 45 07 00 00&lt;/P&gt;&lt;P&gt;GDI: 51 07 00 00 5D 07 00 00 69 07 00 00 75 07 00 00 81 07 00 00 8D 07 00 00 99 07 00 00 A5 07 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0x400, space = 4, mem_items = 4, size = 4)&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF 7E FF FF FF&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0x410, space = 4, mem_items = 526, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 80 B5 84 B0 00 AF 78 60 2C 4B 1B 68 00 2B 43 D1 2B 4B FB 60 FB 68 7A 68 5A 60 FB 68 01 22 1A 70&lt;/P&gt;&lt;P&gt;GDI: 28 4B FA 68 1A 60 28 4A 27 49 28 4B CB 58 80 21 09 04 19 43 25 4B D1 50 25 4B 00 22 1A 60 24 4A&lt;/P&gt;&lt;P&gt;GDI: 84 23 5B 00 00 21 D1 50 21 4A 86 23 5B 00 01 21 D1 50 1F 4A 80 23 5B 00 1E 49 D1 50 1E 4A 1E 49&lt;/P&gt;&lt;P&gt;GDI: C5 23 9B 00 C9 58 1D 4B 0B 40 80 21 09 04 19 43 C5 23 9B 00 D1 50 18 4B 17 4A 12 68 80 21 C9 03&lt;/P&gt;&lt;P&gt;GDI: 0A 43 1A 60 12 4A 84 23 5B 00 03 21 D1 50 0B 4B FA 68 1A 60 FB 68 0C E0 08 4B 1B 68 FB 60 FB 68&lt;/P&gt;&lt;P&gt;GDI: 7A 68 5A 60 FB 68 1B 78 01 33 DA B2 FB 68 1A 70 FB 68 18 1C BD 46 04 B0 80 BD C0 46 18 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 00 FE FF 1F 08 FE FF 1F 00 70 04 40 3C 10 00 00 00 70 03 40 FF FF 9F 00 00 E1 00 E0 FF FF 00 FF&lt;/P&gt;&lt;P&gt;GDI: 80 B5 82 B0 00 AF 0A 4B 1B 68 7B 60 09 4A 86 23 5B 00 01 21 D1 50 07 4A 80 23 5B 00 D3 58 7B 68&lt;/P&gt;&lt;P&gt;GDI: 5B 68 18 1C 00 F0 2C F8 BD 46 02 B0 80 BD C0 46 08 FE FF 1F 00 70 03 40 80 B5 84 B0 00 AF 78 60&lt;/P&gt;&lt;P&gt;GDI: 0D 4B FB 60 FB 68 7A 68 9A 60 FB 68 01 22 1A 71 00 20 FF F7 65 FF 02 1C FB 68 1A 60 FB 68 1B 68&lt;/P&gt;&lt;P&gt;GDI: 00 2B 01 D1 00 23 03 E0 04 4B FA 68 5A 60 FB 68 18 1C BD 46 04 B0 80 BD 0C FE FF 1F 18 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 80 B5 84 B0 00 AF 78 60 05 4B 5B 68 FB 60 FB 68 9B 68 18 1C 00 F0 5A FA BD 46 04 B0 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 18 FE FF 1F 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF 25 4A 26 49 26 4B D1 50 26 4A 88 23 5B 01 00 21 D1 50 24 4A 23 49 24 4B CB 58 C0 21&lt;/P&gt;&lt;P&gt;GDI: C9 00 19 43 21 4B D1 50 1F 4A 21 4B 00 21 D1 50 1D 4B 1D 4A 12 68 C0 21 09 03 0A 43 1A 60 1A 4A&lt;/P&gt;&lt;P&gt;GDI: 19 49 1C 4B C9 58 1C 4B 0B 40 80 21 49 04 19 43 18 4B D1 50 19 4B 06 22 1A 70 18 4B 00 22 5A 70&lt;/P&gt;&lt;P&gt;GDI: 16 4B 16 4A D2 78 D1 B2 1F 22 0A 40 D2 B2 DA 70 13 4B 80 22 1A 70 C0 46 10 4B 9B 79 DB B2 1A 1C&lt;/P&gt;&lt;P&gt;GDI: 10 23 13 40 F8 D0 C0 46 0C 4B 9B 79 DB B2 1A 1C 0C 23 13 40 F8 D1 BD 46 80 BD C0 46 00 E0 00 E0&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00 08 0D 00 00 00 70 04 40 38 10 00 00 44 10 00 00 04 10 00 00 FF FF FF FC 00 40 06 40&lt;/P&gt;&lt;P&gt;GDI: 00 50 06 40 80 B5 00 AF 2C 4B 2C 4A 51 69 2C 4A 0A 40 C0 21 89 00 0A 43 5A 61 2A 4B 29 4A 52 79&lt;/P&gt;&lt;P&gt;GDI: D2 B2 1F 21 8A 43 D2 B2 5A 71 26 4B 25 4A 12 79 D2 B2 07 21 8A 43 D2 B2 1A 71 23 4B 22 4A 12 78&lt;/P&gt;&lt;P&gt;GDI: D2 B2 D2 B2 73 21 8A 43 D2 B2 50 21 0A 43 D2 B2 D2 B2 1A 70 1C 4B 1C 4A 52 78 D2 B2 D2 B2 63 21&lt;/P&gt;&lt;P&gt;GDI: 8A 43 D2 B2 40 21 0A 43 D2 B2 D2 B2 5A 70 16 4B 15 4A 92 78 D2 B2 19 21 8A 43 D2 B2 9A 70 13 4B&lt;/P&gt;&lt;P&gt;GDI: 00 22 1A 70 12 4B 12 4A 51 68 0D 4A 0A 40 C0 21 89 00 0A 43 5A 60 0F 4A 0E 49 C1 23 9B 00 C9 58&lt;/P&gt;&lt;P&gt;GDI: 0D 4B 19 40 C1 23 9B 00 D1 50 00 20 FF F7 04 FE 00 20 00 F0 13 F8 62 B6 BD 46 80 BD 00 A0 04 40&lt;/P&gt;&lt;P&gt;GDI: FF F8 FF FE 00 F0 07 40 00 D0 07 40 00 E0 07 40 00 90 04 40 00 E1 00 E0 FF FF 00 FF 80 B5 84 B0&lt;/P&gt;&lt;P&gt;GDI: 00 AF 78 60 11 4B FB 60 FB 68 7A 68 1A 60 10 4B 0F 4A 52 69 80 21 49 00 0A 43 5A 61 0C 4B 0C 4A&lt;/P&gt;&lt;P&gt;GDI: 11 68 0C 4A 0A 40 1A 60 0B 4B 0B 4A 11 6A 0B 4A 0A 40 80 21 49 00 0A 43 1A 62 09 4B FA 68 9A 60&lt;/P&gt;&lt;P&gt;GDI: FB 68 18 1C BD 46 04 B0 80 BD C0 46 24 FE FF 1F 40 F0 0F 40 FF FE FF FF 00 A0 04 40 FF F8 FF FE&lt;/P&gt;&lt;P&gt;GDI: 18 FE FF 1F 80 B5 82 B0 00 AF 78 60 03 4B 80 22 52 00 DA 60 BD 46 02 B0 80 BD C0 46 40 F0 0F F8&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF 05 4A 06 4B D3 1A 05 4A 10 1C 00 21 1A 1C 00 F0 51 F8 BD 46 80 BD C0 46 44 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 00 FE FF 1F 00 F0 18 F9 FF F7 DA FE FF F7 E8 FF 00 F0 EA F8 00 F0 86 F8 00 F0 1C F9 04 4B 00 20&lt;/P&gt;&lt;P&gt;GDI: 19 1C 00 F0 0D F8 03 1C 18 1C 00 F0 19 F8 C0 46 28 FE FF 1F 80 B5 82 B0 00 AF 78 60 FE E7 C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF F7 1E FF FE E7 C0 46 80 B5 82 B0 00 AF 78 60 00 20 FF F7 B5 FF BD 46 02 B0 80 BD&lt;/P&gt;&lt;P&gt;GDI: 38 B5 05 1C 00 F0 DA F8 00 F0 80 F8 08 4C 23 68 00 2B 02 D0 98 47 00 20 20 60 06 4C 21 68 00 29&lt;/P&gt;&lt;P&gt;GDI: 02 D0 88 47 00 22 22 60 28 1C FF F7 D3 FF 38 BD 2C FE FF 1F 30 FE FF 1F 10 B5 04 1C 00 F0 02 F8&lt;/P&gt;&lt;P&gt;GDI: 20 1C 10 BD 30 B5 C9 B2 03 1C 1F 2A 31 D9 44 42 03 23 23 40 05 D0 D2 1A C5 18 01 70 01 30 A8 42&lt;/P&gt;&lt;P&gt;GDI: FB D1 00 29 05 D0 0D 06 0C 04 2C 43 0B 02 21 43 19 43 54 09 03 1C 00 2C 0E D0 25 1C 01 3D 19 60&lt;/P&gt;&lt;P&gt;GDI: 59 60 99 60 D9 60 19 61 59 61 99 61 D9 61 20 33 00 2D F3 D1 63 01 C3 18 D0 06 40 0F 07 D0 04 1C&lt;/P&gt;&lt;P&gt;GDI: 1D 1C 01 3C 02 C5 00 2C FB D1 80 00 1B 18 03 24 22 40 9D 18 00 2A 03 D0 19 70 01 33 AB 42 FB D1&lt;/P&gt;&lt;P&gt;GDI: 30 BD 00 00 10 B5 0B 4C 0B 4B 9C 42 02 D0 01 CC 80 47 F9 E7 09 4C 0A 48 84 42 02 D0 08 CC 98 47&lt;/P&gt;&lt;P&gt;GDI: F9 E7 08 4C 08 49 8C 42 02 D0 04 CC 90 47 F9 E7 10 BD C0 46 48 0C 00 00 48 0C 00 00 48 0C 00 00&lt;/P&gt;&lt;P&gt;GDI: 48 0C 00 00 48 0C 00 00 48 0C 00 00 10 B5 08 4C 08 4B 9C 42 02 D0 04 CC 90 47 F9 E7 06 4C 07 48&lt;/P&gt;&lt;P&gt;GDI: 84 42 03 D0 04 3C 21 68 88 47 F8 E7 10 BD C0 46 48 0C 00 00 48 0C 00 00 48 0C 00 00 48 0C 00 00&lt;/P&gt;&lt;P&gt;GDI: 00 B5 88 42 1F D0 00 2A 1D D0 03 23 19 42 07 D1 18 42 05 D1 9A 42 03 D9 08 C9 04 3A 08 C0 F2 E7&lt;/P&gt;&lt;P&gt;GDI: 01 23 19 42 09 D1 18 42 07 D1 9A 42 05 D9 0B 88 02 3A 03 80 02 31 02 30 E5 E7 0B 78 01 3A 03 70&lt;/P&gt;&lt;P&gt;GDI: 01 31 01 30 DF E7 00 BD 38 B5 0B 4D 00 2D 11 D0 00 24 2B 19 19 68 00 29 06 D0 2B 19 58 68 9A 68&lt;/P&gt;&lt;P&gt;GDI: FF F7 CE FF 0C 34 F4 E7 5A 68 00 2A F5 D1 98 68 00 28 F2 D1 38 BD C0 46 48 0C 00 00 05 4B 10 B5&lt;/P&gt;&lt;P&gt;GDI: 1C 68 00 2C 04 D0 A0 68 61 68 88 47 24 68 F8 E7 10 BD C0 46 40 FE FF 1F 05 4B 18 1C 00 28 05 D0&lt;/P&gt;&lt;P&gt;GDI: 85 46 81 B0 00 20 C0 43 00 90 01 B0 F7 46 70 47 00 03 00 20 F7 46 70 47&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xC48, space = 4, mem_items = 6, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 48 0C 00 00 00 FE FF 1F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryDownload(EndDownload)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Starting 3rd party flash programming...&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : SPECIFY_NETWORKCARD_ENABLED, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;INF: Copyright 2012 P&amp;amp;E Microcomputer Systems,Inc.&lt;/P&gt;&lt;P&gt;INF: Command Line :"C:\Freescale\CW MCU v10.4\eclipse\..\MCU\bin\de.exe" -noni -language en -ORBendPoint giop:tcp:127.0.0.1: -ORBtraceLevel 0&lt;/P&gt;&lt;P&gt;INF: CMD&amp;gt;RE&lt;/P&gt;&lt;P&gt;INF: Initializing.&lt;/P&gt;&lt;P&gt;INF: Target has been RESET and is active.&lt;/P&gt;&lt;P&gt;INF: CMD&amp;gt;CM C:\Freescale\CW MCU v10.4\MCU\bin\Plugins\support\arm\gdi\P&amp;amp;E\freescale_kl04z8m4_1x32x2k_pflash.arp&lt;/P&gt;&lt;P&gt;INF: Initializing.&lt;/P&gt;&lt;P&gt;INF:&amp;nbsp; Frequency ~ 20971785&lt;/P&gt;&lt;P&gt;INF: (Recommended TRIM=$0089,FTRIM=1)&lt;/P&gt;&lt;P&gt;INF: Initialized.&lt;/P&gt;&lt;P&gt;INF: ;version 1.01, 03/14/2013, Copyright P&amp;amp;E Microcomputer Systems, &lt;A href="http://www.pemicro.com/"&gt;www.pemicro.com&lt;/A&gt; [mk_8k_n_pflash_m0]&lt;/P&gt;&lt;P&gt;INF: ;device freescale, kl04z8m4, 1x32x2k, desc=pflash&lt;/P&gt;&lt;P&gt;INF: ;begin_cs device=$00000000, length=$00002000, ram=$20000000&lt;/P&gt;&lt;P&gt;INF: Loading programming algorithm ...&lt;/P&gt;&lt;P&gt;INF: Done.&lt;/P&gt;&lt;P&gt;INF: CMD&amp;gt;EM&lt;/P&gt;&lt;P&gt;INF: Erasing.&lt;/P&gt;&lt;P&gt;INF: Module has been erased.&lt;/P&gt;&lt;P&gt;INF: Initializing.&lt;/P&gt;&lt;P&gt;INF: Initialized.&lt;/P&gt;&lt;P&gt;INF: ;version 1.01, 03/14/2013, Copyright P&amp;amp;E Microcomputer Systems, &lt;A href="https://community.nxp.com/www.pemicro.com" target="test_blank"&gt;www.pemicro.com&lt;/A&gt; [mk_8k_n_pflash_m0]&lt;/P&gt;&lt;P&gt;INF: ;device freescale, kl04z8m4, 1x32x2k, desc=pflash&lt;/P&gt;&lt;P&gt;INF: ;begin_cs device=$00000000, length=$00002000, ram=$20000000&lt;/P&gt;&lt;P&gt;INF: Loading programming algorithm ...&lt;/P&gt;&lt;P&gt;INF: Done.&lt;/P&gt;&lt;P&gt;INF: CMD&amp;gt;PM&lt;/P&gt;&lt;P&gt;INF: Programming.&lt;/P&gt;&lt;P&gt;INF: Processing Object File Data ...&lt;/P&gt;&lt;P&gt;INF: Error during programming.&lt;/P&gt;&lt;P&gt;ERR: Error Programming flash of device&lt;/P&gt;&lt;P&gt;ERR: Error occured during Flash programming.&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0x0, space = 4, mem_items = 48, size = 4)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: 00 03 00 20 F5 09 00 00 95 05 00 00 A1 05 00 00 AD 05 00 00 B9 05 00 00 C5 05 00 00 D1 05 00 00&lt;/P&gt;&lt;P&gt;GDI: DD 05 00 00 E9 05 00 00 F5 05 00 00 01 06 00 00 0D 06 00 00 19 06 00 00 25 06 00 00 31 06 00 00&lt;/P&gt;&lt;P&gt;GDI: 3D 06 00 00 49 06 00 00 55 06 00 00 61 06 00 00 6D 06 00 00 79 06 00 00 85 06 00 00 91 06 00 00&lt;/P&gt;&lt;P&gt;GDI: 9D 06 00 00 A9 06 00 00 B5 06 00 00 C1 06 00 00 CD 06 00 00 D9 06 00 00 E5 06 00 00 F1 06 00 00&lt;/P&gt;&lt;P&gt;GDI: FD 06 00 00 09 07 00 00 15 07 00 00 21 07 00 00 2D 07 00 00 39 07 00 00 F1 04 00 00 45 07 00 00&lt;/P&gt;&lt;P&gt;GDI: 51 07 00 00 5D 07 00 00 69 07 00 00 75 07 00 00 81 07 00 00 8D 07 00 00 99 07 00 00 A5 07 00 00&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0x400, space = 4, mem_items = 4, size = 4)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF 7E FF FF FF&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0x410, space = 4, mem_items = 526, size = 4)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: 80 B5 84 B0 00 AF 78 60 2C 4B 1B 68 00 2B 43 D1 2B 4B FB 60 FB 68 7A 68 5A 60 FB 68 01 22 1A 70&lt;/P&gt;&lt;P&gt;GDI: 28 4B FA 68 1A 60 28 4A 27 49 28 4B CB 58 80 21 09 04 19 43 25 4B D1 50 25 4B 00 22 1A 60 24 4A&lt;/P&gt;&lt;P&gt;GDI: 84 23 5B 00 00 21 D1 50 21 4A 86 23 5B 00 01 21 D1 50 1F 4A 80 23 5B 00 1E 49 D1 50 1E 4A 1E 49&lt;/P&gt;&lt;P&gt;GDI: C5 23 9B 00 C9 58 1D 4B 0B 40 80 21 09 04 19 43 C5 23 9B 00 D1 50 18 4B 17 4A 12 68 80 21 C9 03&lt;/P&gt;&lt;P&gt;GDI: 0A 43 1A 60 12 4A 84 23 5B 00 03 21 D1 50 0B 4B FA 68 1A 60 FB 68 0C E0 08 4B 1B 68 FB 60 FB 68&lt;/P&gt;&lt;P&gt;GDI: 7A 68 5A 60 FB 68 1B 78 01 33 DA B2 FB 68 1A 70 FB 68 18 1C BD 46 04 B0 80 BD C0 46 18 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 00 FE FF 1F 08 FE FF 1F 00 70 04 40 3C 10 00 00 00 70 03 40 FF FF 9F 00 00 E1 00 E0 FF FF 00 FF&lt;/P&gt;&lt;P&gt;GDI: 80 B5 82 B0 00 AF 0A 4B 1B 68 7B 60 09 4A 86 23 5B 00 01 21 D1 50 07 4A 80 23 5B 00 D3 58 7B 68&lt;/P&gt;&lt;P&gt;GDI: 5B 68 18 1C 00 F0 2C F8 BD 46 02 B0 80 BD C0 46 08 FE FF 1F 00 70 03 40 80 B5 84 B0 00 AF 78 60&lt;/P&gt;&lt;P&gt;GDI: 0D 4B FB 60 FB 68 7A 68 9A 60 FB 68 01 22 1A 71 00 20 FF F7 65 FF 02 1C FB 68 1A 60 FB 68 1B 68&lt;/P&gt;&lt;P&gt;GDI: 00 2B 01 D1 00 23 03 E0 04 4B FA 68 5A 60 FB 68 18 1C BD 46 04 B0 80 BD 0C FE FF 1F 18 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 80 B5 84 B0 00 AF 78 60 05 4B 5B 68 FB 60 FB 68 9B 68 18 1C 00 F0 5A FA BD 46 04 B0 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 18 FE FF 1F 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 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FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 05 Jun 2013 04:03:50 GMT</pubDate>
    <dc:creator>joevignola</dc:creator>
    <dc:date>2013-06-05T04:03:50Z</dc:date>
    <item>
      <title>MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267047#M8750</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;P&gt;When using CodeWarrior 10.4 and 10.3 I can erase and partially program the chip on my bare board.&amp;nbsp; I used the same elf file and programmer to load simple program onto the kl05 freedom board without any problems. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help would be greatly appreciated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Joe&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 31 May 2013 00:29:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267047#M8750</guid>
      <dc:creator>joevignola</dc:creator>
      <dc:date>2013-05-31T00:29:19Z</dc:date>
    </item>
    <item>
      <title>Re: MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267048#M8751</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Joe Vignola,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you mean "&lt;SPAN style="font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: #ffffff;"&gt;When using CodeWarrior 10.4 and 10.3 I can &lt;STRONG style="color: #ff0000;"&gt;not&lt;/STRONG&gt; erase and partially program the chip on my bare board. &lt;/SPAN&gt;"? would you please help to clarify? Thanks for your patience!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;B.R&lt;/P&gt;&lt;P&gt;Kan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Jun 2013 02:46:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267048#M8751</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2013-06-05T02:46:06Z</dc:date>
    </item>
    <item>
      <title>Re: MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267049#M8752</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I get a successful result from erasing the chip but I get an error returned when programming.&amp;nbsp; I have added the log messages below.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks, Joe.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;GDI: DiMeeDisconnect(exec_env_id = 1)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiGdiClose()&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;=== CodeWarrior GDI protocol log ===&lt;/P&gt;&lt;P&gt;GDI DLL: C:\Freescale\CW MCU v10.4\MCU\bin\Plugins\Debugger\protocols\..\..\support\arm\gdi\arm_pne_gdi.dll&lt;/P&gt;&lt;P&gt;CPU: KL04Z8M4&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;GDI: DiGdiOpen()&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiGdiGetFeatures()&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Identification: ARM Cortex M4 P&amp;amp;E to GDI wrapper, Version: 1.0.1, MeeAvailable: true, NrCpusAvailable: 1&lt;/P&gt;&lt;P&gt;GDI: DiGdiAddCallBack(cb_type = 0x4000)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiGdiInitIO()&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_SETMEEID, 1) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : CWDBG, Entry : LaunchConfiguration, Value : KL04_Test_FLASH_PnE U-MultiLink, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DO_DEBUG_OUTPUT, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DEPENDENCY_CHECK, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : UUID, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : CWDBG, Entry : Processor, Value : KL04Z8M4, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : ERASE_PROGRAM_WITHOUT_ASKING, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : AUTO_SYNC, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DOTRIM, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : CURRENT_ALGORITHM_INDEX, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE1_START, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE1_END, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE1_ACTIVE, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE2_START, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE2_END, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE2_ACTIVE, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE3_START, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE3_END, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PRESERVE3_ACTIVE, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : KL04Z8M4, Entry : PRESERVE_EEPROM_START, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : KL04Z8M4, Entry : PRESERVE_EEPROM_END, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : KL04Z8M4, Entry : PRESERVE_EEPROM, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : ALTERNATIVE_ALGORITHM_PATH, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : ALTERNATIVE_ALGORITHM_CHECKBOX, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : PARTITION_PARAM, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : DO_PARTITIONING, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : CUSTOM_TRIM, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : KL04Z8M4, Entry : TRIM_VALUE, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : NGS_TRIM_OVERRIDE_REFERENCE_FREQUENCY, Value : 3276800, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PEDEBUG, Entry : ENABLE_FLASH_PROGRAMMING_DIALOG, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : SPECIFY_NETWORKCARD_ENABLED, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : IO_DELAY_CNT, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP12, Entry : show_hstep_assembly_details, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : CWDBG, Entry : Connect, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : eclipse_show_connection_assistant, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_FX, Value : 4, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_NORMAL, Value : 9, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_OSJTAG, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_CYCLONE, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_TRACELINK, Value : 3, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_LIGHTNING, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FREQ_OPENSDA, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : RESET_DELAY, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : PORT, Value : 21, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : interface_selection, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : PORT, Entry : IP, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : USE_CYCLONEPRO_RELAYS, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CyclonePro_poweroffonexit, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CyclonePro_currentvoltage, Value : 128, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CyclonePro_PowerDownDelay, Value : 250, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CyclonePro_PowerUpDelay, Value : 250, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : Multilink_PowerUpDelay, Value : 1000, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : Multilink_PowerDownDelay, Value : 250, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : FORCE_MASS_ERASE, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : USE_SWD, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : TraceLink_MaxBufferSize, Value : 1, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : CPUTARGETTYPENAME, Value : HFSUIDFH5390FJIfnsdofnfjsdoiFHSIDO, R) =&amp;gt; DI_ERR_NONFATAL&lt;/P&gt;&lt;P&gt;INF: P&amp;amp;E Interface detected - Flash Version 6.10&lt;/P&gt;&lt;P&gt;INF: Device is KL04Z8M4.&lt;/P&gt;&lt;P&gt;INF: Mode is In-Circuit Debug.&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMeeConnect(exec_env_id = 1)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiExecResetChild()&lt;/P&gt;&lt;P&gt;INF: CPU reset by debugger.&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiExecGetStatus(cpu_status = (cause = GDI_WAIT_MISCELLANEOUS, brkpt_id = 0, reason = unknown state))&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(PC (id:0xF))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: PC (id:0xF) -&amp;gt; 0x9F4&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(SP (id:0xD))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: SP (id:0xD) -&amp;gt; 0x20000300&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(LR (id:0xE))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: LR (id:0xE) -&amp;gt; 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Executing Initialization File: C:\Documents and Settings\Lab\workspace.10.4\KL04_Test/Project_Settings/Debugger/init_kinetis.tcl&lt;/P&gt;&lt;P&gt;radix x&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config hexprefix 0x&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config MemIdentifier p&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config MemWidth 32&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config MemAccess 32&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(XPSR (id:0x10))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: XPSR (id:0x10) -&amp;gt; 0x21000000&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0x900, space = 4, mem_items = 64, size = 4)&lt;/P&gt;&lt;P&gt;cmdwin::eclipse::config MemSwap off&lt;/P&gt;&lt;P&gt;cmdwin::reg User\/System Mode Registers/LR = 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0xE000ED30, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: 0B 00 00 00&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE000ED30, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 02 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiRegisterWrite(LR (id:0xE), value = 0xFFFFFFFF)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(LR (id:0xE))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: LR (id:0xE) -&amp;gt; 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(LR (id:0xE))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: LR (id:0xE) -&amp;gt; 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(SP (id:0xD))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: SP (id:0xD) -&amp;gt; 0x20000300&lt;/P&gt;&lt;P&gt;GDI: DiRegisterRead(LR (id:0xE))&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: LR (id:0xE) -&amp;gt; 0xFFFFFFFF&lt;/P&gt;&lt;P&gt;thread break: Stopped, 0x0, 0x0, cpuARMLittle, KL04_Test.elf (state, tid, pid, cpu, target)&lt;/P&gt;&lt;P&gt;cmdwin::reg Breakpoint Unit Registers/BP_COMP0 = 0x0&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE0002008, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;cmdwin::reg Breakpoint Unit Registers/BP_COMP1 = 0x0&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE000200C, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;cmdwin::reg Core Debug Registers/DEMCR = 0x1000001&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE000EDFC, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 01 00 00 01&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_FUNCTION0 = 0x0&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE0001028, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;cmdwin::reg Data Watchpoint and Trace Unit Registers/DWT_FUNCTION1 = 0x0&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xE0001038, space = 4, mem_items = 1, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryDownload(StartDownload)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0x0, space = 4, mem_items = 48, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 00 03 00 20 F5 09 00 00 95 05 00 00 A1 05 00 00 AD 05 00 00 B9 05 00 00 C5 05 00 00 D1 05 00 00&lt;/P&gt;&lt;P&gt;GDI: DD 05 00 00 E9 05 00 00 F5 05 00 00 01 06 00 00 0D 06 00 00 19 06 00 00 25 06 00 00 31 06 00 00&lt;/P&gt;&lt;P&gt;GDI: 3D 06 00 00 49 06 00 00 55 06 00 00 61 06 00 00 6D 06 00 00 79 06 00 00 85 06 00 00 91 06 00 00&lt;/P&gt;&lt;P&gt;GDI: 9D 06 00 00 A9 06 00 00 B5 06 00 00 C1 06 00 00 CD 06 00 00 D9 06 00 00 E5 06 00 00 F1 06 00 00&lt;/P&gt;&lt;P&gt;GDI: FD 06 00 00 09 07 00 00 15 07 00 00 21 07 00 00 2D 07 00 00 39 07 00 00 F1 04 00 00 45 07 00 00&lt;/P&gt;&lt;P&gt;GDI: 51 07 00 00 5D 07 00 00 69 07 00 00 75 07 00 00 81 07 00 00 8D 07 00 00 99 07 00 00 A5 07 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0x400, space = 4, mem_items = 4, size = 4)&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF 7E FF FF FF&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0x410, space = 4, mem_items = 526, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 80 B5 84 B0 00 AF 78 60 2C 4B 1B 68 00 2B 43 D1 2B 4B FB 60 FB 68 7A 68 5A 60 FB 68 01 22 1A 70&lt;/P&gt;&lt;P&gt;GDI: 28 4B FA 68 1A 60 28 4A 27 49 28 4B CB 58 80 21 09 04 19 43 25 4B D1 50 25 4B 00 22 1A 60 24 4A&lt;/P&gt;&lt;P&gt;GDI: 84 23 5B 00 00 21 D1 50 21 4A 86 23 5B 00 01 21 D1 50 1F 4A 80 23 5B 00 1E 49 D1 50 1E 4A 1E 49&lt;/P&gt;&lt;P&gt;GDI: C5 23 9B 00 C9 58 1D 4B 0B 40 80 21 09 04 19 43 C5 23 9B 00 D1 50 18 4B 17 4A 12 68 80 21 C9 03&lt;/P&gt;&lt;P&gt;GDI: 0A 43 1A 60 12 4A 84 23 5B 00 03 21 D1 50 0B 4B FA 68 1A 60 FB 68 0C E0 08 4B 1B 68 FB 60 FB 68&lt;/P&gt;&lt;P&gt;GDI: 7A 68 5A 60 FB 68 1B 78 01 33 DA B2 FB 68 1A 70 FB 68 18 1C BD 46 04 B0 80 BD C0 46 18 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 00 FE FF 1F 08 FE FF 1F 00 70 04 40 3C 10 00 00 00 70 03 40 FF FF 9F 00 00 E1 00 E0 FF FF 00 FF&lt;/P&gt;&lt;P&gt;GDI: 80 B5 82 B0 00 AF 0A 4B 1B 68 7B 60 09 4A 86 23 5B 00 01 21 D1 50 07 4A 80 23 5B 00 D3 58 7B 68&lt;/P&gt;&lt;P&gt;GDI: 5B 68 18 1C 00 F0 2C F8 BD 46 02 B0 80 BD C0 46 08 FE FF 1F 00 70 03 40 80 B5 84 B0 00 AF 78 60&lt;/P&gt;&lt;P&gt;GDI: 0D 4B FB 60 FB 68 7A 68 9A 60 FB 68 01 22 1A 71 00 20 FF F7 65 FF 02 1C FB 68 1A 60 FB 68 1B 68&lt;/P&gt;&lt;P&gt;GDI: 00 2B 01 D1 00 23 03 E0 04 4B FA 68 5A 60 FB 68 18 1C BD 46 04 B0 80 BD 0C FE FF 1F 18 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 80 B5 84 B0 00 AF 78 60 05 4B 5B 68 FB 60 FB 68 9B 68 18 1C 00 F0 5A FA BD 46 04 B0 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 18 FE FF 1F 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF 25 4A 26 49 26 4B D1 50 26 4A 88 23 5B 01 00 21 D1 50 24 4A 23 49 24 4B CB 58 C0 21&lt;/P&gt;&lt;P&gt;GDI: C9 00 19 43 21 4B D1 50 1F 4A 21 4B 00 21 D1 50 1D 4B 1D 4A 12 68 C0 21 09 03 0A 43 1A 60 1A 4A&lt;/P&gt;&lt;P&gt;GDI: 19 49 1C 4B C9 58 1C 4B 0B 40 80 21 49 04 19 43 18 4B D1 50 19 4B 06 22 1A 70 18 4B 00 22 5A 70&lt;/P&gt;&lt;P&gt;GDI: 16 4B 16 4A D2 78 D1 B2 1F 22 0A 40 D2 B2 DA 70 13 4B 80 22 1A 70 C0 46 10 4B 9B 79 DB B2 1A 1C&lt;/P&gt;&lt;P&gt;GDI: 10 23 13 40 F8 D0 C0 46 0C 4B 9B 79 DB B2 1A 1C 0C 23 13 40 F8 D1 BD 46 80 BD C0 46 00 E0 00 E0&lt;/P&gt;&lt;P&gt;GDI: 00 00 00 00 08 0D 00 00 00 70 04 40 38 10 00 00 44 10 00 00 04 10 00 00 FF FF FF FC 00 40 06 40&lt;/P&gt;&lt;P&gt;GDI: 00 50 06 40 80 B5 00 AF 2C 4B 2C 4A 51 69 2C 4A 0A 40 C0 21 89 00 0A 43 5A 61 2A 4B 29 4A 52 79&lt;/P&gt;&lt;P&gt;GDI: D2 B2 1F 21 8A 43 D2 B2 5A 71 26 4B 25 4A 12 79 D2 B2 07 21 8A 43 D2 B2 1A 71 23 4B 22 4A 12 78&lt;/P&gt;&lt;P&gt;GDI: D2 B2 D2 B2 73 21 8A 43 D2 B2 50 21 0A 43 D2 B2 D2 B2 1A 70 1C 4B 1C 4A 52 78 D2 B2 D2 B2 63 21&lt;/P&gt;&lt;P&gt;GDI: 8A 43 D2 B2 40 21 0A 43 D2 B2 D2 B2 5A 70 16 4B 15 4A 92 78 D2 B2 19 21 8A 43 D2 B2 9A 70 13 4B&lt;/P&gt;&lt;P&gt;GDI: 00 22 1A 70 12 4B 12 4A 51 68 0D 4A 0A 40 C0 21 89 00 0A 43 5A 60 0F 4A 0E 49 C1 23 9B 00 C9 58&lt;/P&gt;&lt;P&gt;GDI: 0D 4B 19 40 C1 23 9B 00 D1 50 00 20 FF F7 04 FE 00 20 00 F0 13 F8 62 B6 BD 46 80 BD 00 A0 04 40&lt;/P&gt;&lt;P&gt;GDI: FF F8 FF FE 00 F0 07 40 00 D0 07 40 00 E0 07 40 00 90 04 40 00 E1 00 E0 FF FF 00 FF 80 B5 84 B0&lt;/P&gt;&lt;P&gt;GDI: 00 AF 78 60 11 4B FB 60 FB 68 7A 68 1A 60 10 4B 0F 4A 52 69 80 21 49 00 0A 43 5A 61 0C 4B 0C 4A&lt;/P&gt;&lt;P&gt;GDI: 11 68 0C 4A 0A 40 1A 60 0B 4B 0B 4A 11 6A 0B 4A 0A 40 80 21 49 00 0A 43 1A 62 09 4B FA 68 9A 60&lt;/P&gt;&lt;P&gt;GDI: FB 68 18 1C BD 46 04 B0 80 BD C0 46 24 FE FF 1F 40 F0 0F 40 FF FE FF FF 00 A0 04 40 FF F8 FF FE&lt;/P&gt;&lt;P&gt;GDI: 18 FE FF 1F 80 B5 82 B0 00 AF 78 60 03 4B 80 22 52 00 DA 60 BD 46 02 B0 80 BD C0 46 40 F0 0F F8&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF 05 4A 06 4B D3 1A 05 4A 10 1C 00 21 1A 1C 00 F0 51 F8 BD 46 80 BD C0 46 44 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 00 FE FF 1F 00 F0 18 F9 FF F7 DA FE FF F7 E8 FF 00 F0 EA F8 00 F0 86 F8 00 F0 1C F9 04 4B 00 20&lt;/P&gt;&lt;P&gt;GDI: 19 1C 00 F0 0D F8 03 1C 18 1C 00 F0 19 F8 C0 46 28 FE FF 1F 80 B5 82 B0 00 AF 78 60 FE E7 C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF F7 1E FF FE E7 C0 46 80 B5 82 B0 00 AF 78 60 00 20 FF F7 B5 FF BD 46 02 B0 80 BD&lt;/P&gt;&lt;P&gt;GDI: 38 B5 05 1C 00 F0 DA F8 00 F0 80 F8 08 4C 23 68 00 2B 02 D0 98 47 00 20 20 60 06 4C 21 68 00 29&lt;/P&gt;&lt;P&gt;GDI: 02 D0 88 47 00 22 22 60 28 1C FF F7 D3 FF 38 BD 2C FE FF 1F 30 FE FF 1F 10 B5 04 1C 00 F0 02 F8&lt;/P&gt;&lt;P&gt;GDI: 20 1C 10 BD 30 B5 C9 B2 03 1C 1F 2A 31 D9 44 42 03 23 23 40 05 D0 D2 1A C5 18 01 70 01 30 A8 42&lt;/P&gt;&lt;P&gt;GDI: FB D1 00 29 05 D0 0D 06 0C 04 2C 43 0B 02 21 43 19 43 54 09 03 1C 00 2C 0E D0 25 1C 01 3D 19 60&lt;/P&gt;&lt;P&gt;GDI: 59 60 99 60 D9 60 19 61 59 61 99 61 D9 61 20 33 00 2D F3 D1 63 01 C3 18 D0 06 40 0F 07 D0 04 1C&lt;/P&gt;&lt;P&gt;GDI: 1D 1C 01 3C 02 C5 00 2C FB D1 80 00 1B 18 03 24 22 40 9D 18 00 2A 03 D0 19 70 01 33 AB 42 FB D1&lt;/P&gt;&lt;P&gt;GDI: 30 BD 00 00 10 B5 0B 4C 0B 4B 9C 42 02 D0 01 CC 80 47 F9 E7 09 4C 0A 48 84 42 02 D0 08 CC 98 47&lt;/P&gt;&lt;P&gt;GDI: F9 E7 08 4C 08 49 8C 42 02 D0 04 CC 90 47 F9 E7 10 BD C0 46 48 0C 00 00 48 0C 00 00 48 0C 00 00&lt;/P&gt;&lt;P&gt;GDI: 48 0C 00 00 48 0C 00 00 48 0C 00 00 10 B5 08 4C 08 4B 9C 42 02 D0 04 CC 90 47 F9 E7 06 4C 07 48&lt;/P&gt;&lt;P&gt;GDI: 84 42 03 D0 04 3C 21 68 88 47 F8 E7 10 BD C0 46 48 0C 00 00 48 0C 00 00 48 0C 00 00 48 0C 00 00&lt;/P&gt;&lt;P&gt;GDI: 00 B5 88 42 1F D0 00 2A 1D D0 03 23 19 42 07 D1 18 42 05 D1 9A 42 03 D9 08 C9 04 3A 08 C0 F2 E7&lt;/P&gt;&lt;P&gt;GDI: 01 23 19 42 09 D1 18 42 07 D1 9A 42 05 D9 0B 88 02 3A 03 80 02 31 02 30 E5 E7 0B 78 01 3A 03 70&lt;/P&gt;&lt;P&gt;GDI: 01 31 01 30 DF E7 00 BD 38 B5 0B 4D 00 2D 11 D0 00 24 2B 19 19 68 00 29 06 D0 2B 19 58 68 9A 68&lt;/P&gt;&lt;P&gt;GDI: FF F7 CE FF 0C 34 F4 E7 5A 68 00 2A F5 D1 98 68 00 28 F2 D1 38 BD C0 46 48 0C 00 00 05 4B 10 B5&lt;/P&gt;&lt;P&gt;GDI: 1C 68 00 2C 04 D0 A0 68 61 68 88 47 24 68 F8 E7 10 BD C0 46 40 FE FF 1F 05 4B 18 1C 00 28 05 D0&lt;/P&gt;&lt;P&gt;GDI: 85 46 81 B0 00 20 C0 43 00 90 01 B0 F7 46 70 47 00 03 00 20 F7 46 70 47&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryWrite(addr = 0xC48, space = 4, mem_items = 6, size = 4)&lt;/P&gt;&lt;P&gt;GDI: 48 0C 00 00 00 FE FF 1F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryDownload(EndDownload)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Starting 3rd party flash programming...&lt;/P&gt;&lt;P&gt;GDI: Mtwks Callback(MTWKS_CB_PROJECTACCESS, Section : STARTUP, Entry : SPECIFY_NETWORKCARD_ENABLED, Value : 0, R) =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;INF: Copyright 2012 P&amp;amp;E Microcomputer Systems,Inc.&lt;/P&gt;&lt;P&gt;INF: Command Line :"C:\Freescale\CW MCU v10.4\eclipse\..\MCU\bin\de.exe" -noni -language en -ORBendPoint giop:tcp:127.0.0.1: -ORBtraceLevel 0&lt;/P&gt;&lt;P&gt;INF: CMD&amp;gt;RE&lt;/P&gt;&lt;P&gt;INF: Initializing.&lt;/P&gt;&lt;P&gt;INF: Target has been RESET and is active.&lt;/P&gt;&lt;P&gt;INF: CMD&amp;gt;CM C:\Freescale\CW MCU v10.4\MCU\bin\Plugins\support\arm\gdi\P&amp;amp;E\freescale_kl04z8m4_1x32x2k_pflash.arp&lt;/P&gt;&lt;P&gt;INF: Initializing.&lt;/P&gt;&lt;P&gt;INF:&amp;nbsp; Frequency ~ 20971785&lt;/P&gt;&lt;P&gt;INF: (Recommended TRIM=$0089,FTRIM=1)&lt;/P&gt;&lt;P&gt;INF: Initialized.&lt;/P&gt;&lt;P&gt;INF: ;version 1.01, 03/14/2013, Copyright P&amp;amp;E Microcomputer Systems, &lt;A href="http://www.pemicro.com/"&gt;www.pemicro.com&lt;/A&gt; [mk_8k_n_pflash_m0]&lt;/P&gt;&lt;P&gt;INF: ;device freescale, kl04z8m4, 1x32x2k, desc=pflash&lt;/P&gt;&lt;P&gt;INF: ;begin_cs device=$00000000, length=$00002000, ram=$20000000&lt;/P&gt;&lt;P&gt;INF: Loading programming algorithm ...&lt;/P&gt;&lt;P&gt;INF: Done.&lt;/P&gt;&lt;P&gt;INF: CMD&amp;gt;EM&lt;/P&gt;&lt;P&gt;INF: Erasing.&lt;/P&gt;&lt;P&gt;INF: Module has been erased.&lt;/P&gt;&lt;P&gt;INF: Initializing.&lt;/P&gt;&lt;P&gt;INF: Initialized.&lt;/P&gt;&lt;P&gt;INF: ;version 1.01, 03/14/2013, Copyright P&amp;amp;E Microcomputer Systems, &lt;A href="https://community.nxp.com/www.pemicro.com" target="test_blank"&gt;www.pemicro.com&lt;/A&gt; [mk_8k_n_pflash_m0]&lt;/P&gt;&lt;P&gt;INF: ;device freescale, kl04z8m4, 1x32x2k, desc=pflash&lt;/P&gt;&lt;P&gt;INF: ;begin_cs device=$00000000, length=$00002000, ram=$20000000&lt;/P&gt;&lt;P&gt;INF: Loading programming algorithm ...&lt;/P&gt;&lt;P&gt;INF: Done.&lt;/P&gt;&lt;P&gt;INF: CMD&amp;gt;PM&lt;/P&gt;&lt;P&gt;INF: Programming.&lt;/P&gt;&lt;P&gt;INF: Processing Object File Data ...&lt;/P&gt;&lt;P&gt;INF: Error during programming.&lt;/P&gt;&lt;P&gt;ERR: Error Programming flash of device&lt;/P&gt;&lt;P&gt;ERR: Error occured during Flash programming.&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0x0, space = 4, mem_items = 48, size = 4)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: 00 03 00 20 F5 09 00 00 95 05 00 00 A1 05 00 00 AD 05 00 00 B9 05 00 00 C5 05 00 00 D1 05 00 00&lt;/P&gt;&lt;P&gt;GDI: DD 05 00 00 E9 05 00 00 F5 05 00 00 01 06 00 00 0D 06 00 00 19 06 00 00 25 06 00 00 31 06 00 00&lt;/P&gt;&lt;P&gt;GDI: 3D 06 00 00 49 06 00 00 55 06 00 00 61 06 00 00 6D 06 00 00 79 06 00 00 85 06 00 00 91 06 00 00&lt;/P&gt;&lt;P&gt;GDI: 9D 06 00 00 A9 06 00 00 B5 06 00 00 C1 06 00 00 CD 06 00 00 D9 06 00 00 E5 06 00 00 F1 06 00 00&lt;/P&gt;&lt;P&gt;GDI: FD 06 00 00 09 07 00 00 15 07 00 00 21 07 00 00 2D 07 00 00 39 07 00 00 F1 04 00 00 45 07 00 00&lt;/P&gt;&lt;P&gt;GDI: 51 07 00 00 5D 07 00 00 69 07 00 00 75 07 00 00 81 07 00 00 8D 07 00 00 99 07 00 00 A5 07 00 00&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0x400, space = 4, mem_items = 4, size = 4)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF 7E FF FF FF&lt;/P&gt;&lt;P&gt;GDI: DiMemoryRead(addr = 0x410, space = 4, mem_items = 526, size = 4)&lt;/P&gt;&lt;P&gt;GDI: =&amp;gt; DI_OK&lt;/P&gt;&lt;P&gt;GDI: 80 B5 84 B0 00 AF 78 60 2C 4B 1B 68 00 2B 43 D1 2B 4B FB 60 FB 68 7A 68 5A 60 FB 68 01 22 1A 70&lt;/P&gt;&lt;P&gt;GDI: 28 4B FA 68 1A 60 28 4A 27 49 28 4B CB 58 80 21 09 04 19 43 25 4B D1 50 25 4B 00 22 1A 60 24 4A&lt;/P&gt;&lt;P&gt;GDI: 84 23 5B 00 00 21 D1 50 21 4A 86 23 5B 00 01 21 D1 50 1F 4A 80 23 5B 00 1E 49 D1 50 1E 4A 1E 49&lt;/P&gt;&lt;P&gt;GDI: C5 23 9B 00 C9 58 1D 4B 0B 40 80 21 09 04 19 43 C5 23 9B 00 D1 50 18 4B 17 4A 12 68 80 21 C9 03&lt;/P&gt;&lt;P&gt;GDI: 0A 43 1A 60 12 4A 84 23 5B 00 03 21 D1 50 0B 4B FA 68 1A 60 FB 68 0C E0 08 4B 1B 68 FB 60 FB 68&lt;/P&gt;&lt;P&gt;GDI: 7A 68 5A 60 FB 68 1B 78 01 33 DA B2 FB 68 1A 70 FB 68 18 1C BD 46 04 B0 80 BD C0 46 18 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 00 FE FF 1F 08 FE FF 1F 00 70 04 40 3C 10 00 00 00 70 03 40 FF FF 9F 00 00 E1 00 E0 FF FF 00 FF&lt;/P&gt;&lt;P&gt;GDI: 80 B5 82 B0 00 AF 0A 4B 1B 68 7B 60 09 4A 86 23 5B 00 01 21 D1 50 07 4A 80 23 5B 00 D3 58 7B 68&lt;/P&gt;&lt;P&gt;GDI: 5B 68 18 1C 00 F0 2C F8 BD 46 02 B0 80 BD C0 46 08 FE FF 1F 00 70 03 40 80 B5 84 B0 00 AF 78 60&lt;/P&gt;&lt;P&gt;GDI: 0D 4B FB 60 FB 68 7A 68 9A 60 FB 68 01 22 1A 71 00 20 FF F7 65 FF 02 1C FB 68 1A 60 FB 68 1B 68&lt;/P&gt;&lt;P&gt;GDI: 00 2B 01 D1 00 23 03 E0 04 4B FA 68 5A 60 FB 68 18 1C BD 46 04 B0 80 BD 0C FE FF 1F 18 FE FF 1F&lt;/P&gt;&lt;P&gt;GDI: 80 B5 84 B0 00 AF 78 60 05 4B 5B 68 FB 60 FB 68 9B 68 18 1C 00 F0 5A FA BD 46 04 B0 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 18 FE FF 1F 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF&lt;/P&gt;&lt;P&gt;GDI: FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46&lt;/P&gt;&lt;P&gt;GDI: 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46 80 BD C0 46 80 B5 00 AF FF BE BD 46&lt;/P&gt;&lt;P&gt;GDI: 80 BD C0 46 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 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FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;GDI: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Jun 2013 04:03:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267049#M8752</guid>
      <dc:creator>joevignola</dc:creator>
      <dc:date>2013-06-05T04:03:50Z</dc:date>
    </item>
    <item>
      <title>Re: MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267050#M8753</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Joe，&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Seems only part of the codes have been downloaded successfully, I will check it with the CW team and let you know when I have any more information.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BTW, would you please show me the debugger configuration that you are using? just like below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="1.PNG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119444i522F9A1864B020A4/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.PNG" alt="1.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your patience!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;B.R&lt;/P&gt;&lt;P&gt;Kan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Jun 2013 06:53:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267050#M8753</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2013-06-05T06:53:23Z</dc:date>
    </item>
    <item>
      <title>Re: MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267051#M8754</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Here is my configuration&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="KL04_debug.PNG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119445iA85BA7B23BCD0A70/image-size/large?v=v2&amp;amp;px=999" role="button" title="KL04_debug.PNG" alt="KL04_debug.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Jun 2013 15:37:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267051#M8754</guid>
      <dc:creator>joevignola</dc:creator>
      <dc:date>2013-06-05T15:37:12Z</dc:date>
    </item>
    <item>
      <title>Re: MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267052#M8755</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Joe,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for the information!! I have just discussed with the CW support team, and they would like to ask for more information during the programming, would you please check the option shown as below? That might help to give more information regarding this issue. &lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="prg_dialog.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119446iEB15BC56F26D3ECE/image-size/large?v=v2&amp;amp;px=999" role="button" title="prg_dialog.JPG" alt="prg_dialog.JPG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;BTW, do you have another board with KL04Z? is it the same result? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your patience!!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;B.R&lt;/P&gt;&lt;P&gt;Kan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Jun 2013 05:02:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267052#M8755</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2013-06-06T05:02:11Z</dc:date>
    </item>
    <item>
      <title>Re: MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267053#M8756</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Here is the dialog that pops up.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="PandEMicro.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119447i368B6B2370974C0E/image-size/large?v=v2&amp;amp;px=999" role="button" title="PandEMicro.JPG" alt="PandEMicro.JPG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Jun 2013 16:53:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267053#M8756</guid>
      <dc:creator>joevignola</dc:creator>
      <dc:date>2013-06-06T16:53:15Z</dc:date>
    </item>
    <item>
      <title>Re: MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267054#M8757</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Here is the basic schematic that I'm using.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Joe.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="KL04_basic.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119448iBA94CFA7B88E2386/image-size/large?v=v2&amp;amp;px=999" role="button" title="KL04_basic.png" alt="KL04_basic.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Jun 2013 23:20:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267054#M8757</guid>
      <dc:creator>joevignola</dc:creator>
      <dc:date>2013-06-06T23:20:24Z</dc:date>
    </item>
    <item>
      <title>Re: MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267055#M8758</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for the information!! The schematics should be ok, but it still hard to locate the possible cause. Have you got another programmer such as Jlink to have a try? if not, I remember you have a FRDM-KL05Z , and its on board OpenSDA can be used to program the external device, would you please try it following the guide from &lt;A href="http://mcuoneclipse.com/2013/04/27/debug-external-processors-with-usbdm-and-freedom-board/" title="http://mcuoneclipse.com/2013/04/27/debug-external-processors-with-usbdm-and-freedom-board/"&gt;Debug External Processors with USBDM and Freedom Board | MCU on Eclipse?&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please kindly let me know if the problem is still there.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;B.R&lt;/P&gt;&lt;P&gt;Kan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Jun 2013 04:59:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267055#M8758</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2013-06-07T04:59:35Z</dc:date>
    </item>
    <item>
      <title>Re: MKL04Z8VLC4 programming</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267056#M8759</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Turns out that there was a bug in the P&amp;amp;E micro algorithm for the KL04Z8 chip.&amp;nbsp; Here is the one that they sent me but I'm sure they will post an update on their web site.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;there was an error in the processor expert code too, which had the wrong starting address for the RAM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-size: 16px; font-family: 'Times New Roman'; color: #000000;"&gt;&lt;SPAN style="color: #666666; font-size: 10pt; font-family: Arial;"&gt;&lt;A href="https://mail.alpha.com/owa/redir.aspx?C=594764ab5c7f4feda3460fb01a8d97bb&amp;amp;URL=http%3a%2f%2fwww.pemicro.com%2fdownloads%2fuser_downloads_temp%2f201306070416321137109883012%2ffreescale_kl04z8m4_1x32x2k_pflash.arp" rel="nofollow noopener noreferrer" style="color: purple; text-decoration: underline;" target="_blank"&gt;freescale_kl04z8m4_1x32x2k_pflash.arp&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="font-size: 16px; font-family: 'Times New Roman'; color: #000000;"&gt;&lt;/P&gt;&lt;PRE style="font-size: 10pt; font-family: 'Courier New'; color: #000000;"&gt;
&lt;P&gt;;version 1.02, 06/05/2013, Copyright P&amp;amp;E Microcomputer Systems, &lt;A href="http://www.pemicro.com/" rel="nofollow noopener noreferrer" target="_blank"&gt;www.pemicro.com&lt;/A&gt; [mk_8k_n_pflash_m0]&lt;/P&gt;
&lt;P&gt;;device freescale, kl04z8m4, 1x32x2k, desc=pflash&lt;/P&gt;
&lt;P&gt;;begin_cs device=$00000000, length=$00002000, ram=$20000000&lt;/P&gt;
&lt;P&gt;;end_cs&lt;/P&gt;
&lt;P&gt;REQUIRES_PROG_VERSION=1.03/&lt;/P&gt;
&lt;P&gt;NO_ON_CHIP_RAM&lt;/P&gt;
&lt;P&gt;DO_MASS_ERASE_AND_RESET ;Perform MDM Mass erase&lt;/P&gt;
&lt;P&gt;NO_TIMING_TEST&lt;/P&gt;
&lt;P&gt;WRITE_LONG=0000A000/F000300C/ ; turn off speculation and cache&lt;/P&gt;
&lt;P&gt;WRITE_LONG=FFFFFFFF/40020010/ ;All PFlash protection off&lt;/P&gt;
&lt;P&gt;WRITE_LONG=00000000/40048100/ ; turn off watchdog timer&lt;/P&gt;
&lt;P&gt;BLANK_MODULE_ONLY&lt;/P&gt;
&lt;P&gt;BOUNDARY_MASK=FFFFFC00/&lt;/P&gt;
&lt;P&gt;BLOCKING_MASK=00000003/&lt;/P&gt;
&lt;P&gt;NO_BASE_ADDRESS=00000000/&lt;/P&gt;
&lt;P&gt;ADDR_RANGE=00000000/00001FFF/00/FFFFFFFC/FFFFFC00/ ; $00000000-$00001FFF P-Flash&lt;/P&gt;
&lt;P&gt;TEST_VALUE=00/0000040C/00000033/00000020/00/003/007/Data that is about to be programmed will permanently secure the device. Continue?/&lt;/P&gt;
&lt;P&gt;TEST_VALUE=00/0000040C/00000033/00000021/00/003/007/Data that is about to be programmed will permanently secure the device. Continue?/&lt;/P&gt;
&lt;P&gt;TEST_VALUE=00/0000040C/00000033/00000023/00/003/007/Data that is about to be programmed will permanently secure the device. Continue?/&lt;/P&gt;
&lt;P&gt;ICS_RANGE=000312500/000390625/000006400/ ICS Range (LSB = decimal place)&lt;/P&gt;
&lt;P&gt;09BIT_TRIM=40064002/40064003/01/000003FF/000003FE/01400000/&lt;/P&gt;
&lt;P&gt;USER=SD Secure Device 0 /00000000/00000000/&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;S01800006D6B5F386B5F6E5F70666C6173685F6D302E7331395C&lt;/P&gt;
&lt;P&gt;S315200000000C0100200C01002000010000000000006F&lt;/P&gt;
&lt;P&gt;S315200000100020000000000000640000200000000016&lt;/P&gt;
&lt;P&gt;S3152000002000000000620000208A0000208A000020D4&lt;/P&gt;
&lt;P&gt;S315200000304E00002050000020540000200000000048&lt;/P&gt;
&lt;P&gt;S315200000400000000000000000CA00002000BE00BE24&lt;/P&gt;
&lt;P&gt;S3152000005000BE0000214D70262E702A787026324070&lt;/P&gt;
&lt;P&gt;S3152000006000BE00BE224E234F234C00211F4A8A4643&lt;/P&gt;
&lt;P&gt;S315200000700B88891CB24503D1A34205D1921EF6E70F&lt;/P&gt;
&lt;P&gt;S31520000080BB4201D1921EF2D100BE144669600626FB&lt;/P&gt;
&lt;P&gt;S31520000090EE711E782E725B1C1E786E725B1C1E78AB&lt;/P&gt;
&lt;P&gt;S315200000A0AE725B1C1E78EE725B1C80262E7000BF23&lt;/P&gt;
&lt;P&gt;S315200000B02E7880221640FBD02E787022164003D14F&lt;/P&gt;
&lt;P&gt;S315200000C0091D241FE2D1002200BE0422064B084F40&lt;/P&gt;
&lt;P&gt;S315200000D03C68044E26401E600549D6E700000240D3&lt;/P&gt;
&lt;P&gt;S315200000E0FEFFFFFFFCFFFFFF0C01002000200000A9&lt;/P&gt;
&lt;P&gt;S311200000F00C040000FFFF0000FEFF0000D3&lt;/P&gt;
&lt;P&gt;S70520000000DA&lt;/P&gt;
&lt;P&gt;¥F&lt;/P&gt;


&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/PRE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Jun 2013 23:26:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKL04Z8VLC4-programming/m-p/267056#M8759</guid>
      <dc:creator>joevignola</dc:creator>
      <dc:date>2013-06-07T23:26:22Z</dc:date>
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