<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>Kinetis MicrocontrollersのトピックRe: External Ram and Nand flash</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249223#M6933</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, your understanding is correct.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;B.R&lt;/P&gt;&lt;P&gt;Kan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 06 Mar 2014 08:51:24 GMT</pubDate>
    <dc:creator>Kan_Li</dc:creator>
    <dc:date>2014-03-06T08:51:24Z</dc:date>
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      <title>External Ram and Nand flash</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249220#M6930</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Are There anyone who has implemented External ram and the Nand flash as in TWR-60F120M ?&lt;/P&gt;&lt;P&gt;I have implemented on my board external ram like AN4393 figure 5. But when i look at the data for the Nand flash implentation there are some pins that are connected&amp;nbsp; together.&lt;/P&gt;&lt;P&gt;Lars&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 Jul 2013 07:30:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249220#M6930</guid>
      <dc:creator>larsbayalexande</dc:creator>
      <dc:date>2013-07-02T07:30:45Z</dc:date>
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    <item>
      <title>Re: External Ram and Nand flash</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249221#M6931</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;K60 120MHz part does implement an arbitration scheme that allows for sharing between the FlexBus and NFC; however, this sharing is really only used for the NFC data lines/FlexBus AD lines and the NFC_WE and FlexBus R/W signals. If you look at the signal muxing table in the manual you can see that these pins only have a single function selection for FlexBus/NFC.&amp;nbsp; For example, PTB20 function ALT5 is “FB_AD31/NFC_DATA15.” So this is a case where the pin is configured for a FB/NFC mode and dynamically switches between the two.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the case of the control signal pins (for example,NFC_CE0 and NFC_RB) which have different programmed functions to choose between the FlexBus and NFC signals on the pins, it does not dynamically switch between the functions. It is fixed as a FlexBus or NFC pin based on whether you choose ALT5 or ALT6.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So this means if customer wants to use FB_BE23_16 and FB_BE31_24 to connect external SRAM, then they will not be able to use NAND flash at the same time. As a possible solution, the customer could add a small amount of external logic to decode the lower address lines and use those to generate byte enable signals. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope that helps,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;B.R&lt;/P&gt;&lt;P&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 Jul 2013 08:30:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249221#M6931</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2013-07-05T08:30:04Z</dc:date>
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    <item>
      <title>Re: External Ram and Nand flash</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249222#M6932</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;If I understand the situation correctly, the only NFC pins that do not work with FB arbitration are NFC_RB, NFC_CE0 and NFC_CE1. &lt;/P&gt;&lt;P&gt;The NFC_CLE, NFC_ALE, and NFC_RE pins should work with the dynamic switching.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is that correct?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Mar 2014 19:53:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249222#M6932</guid>
      <dc:creator>williamely</dc:creator>
      <dc:date>2014-03-05T19:53:42Z</dc:date>
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    <item>
      <title>Re: External Ram and Nand flash</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249223#M6933</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, your understanding is correct.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;B.R&lt;/P&gt;&lt;P&gt;Kan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Mar 2014 08:51:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249223#M6933</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2014-03-06T08:51:24Z</dc:date>
    </item>
    <item>
      <title>Re: External Ram and Nand flash</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249224#M6934</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a TWR-K60F120 and TWR-MEM board. I checked the signal on these boards, it seems only NAND flash use the NFC_RB , NFC_CE0_b, NFC_ALE, NFC_RE. Then it should not conflict. The problem now is that when I plug in the TWR-MEM board and&amp;nbsp; test the nandflash using the sample code nandflash_twrk60f210m, the writing is fine but the reading always return -1. After I unplug the TWR-MEM and still use the same code to test the nand flash, it works fine.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you have any ideas which part can cause this problem?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 16:57:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249224#M6934</guid>
      <dc:creator>danielchai</dc:creator>
      <dc:date>2014-03-07T16:57:52Z</dc:date>
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      <title>Re: External Ram and Nand flash</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249225#M6935</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Daniel,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please kindly check the J11 and J16 on TWR-MEM, and they should be left unconnected to avoid the interference from the onboard CPLD. My colleague has experienced such issue and solved it with these two jumpers open.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope that helps,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kan&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 11 Mar 2014 03:08:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/External-Ram-and-Nand-flash/m-p/249225#M6935</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2014-03-11T03:08:55Z</dc:date>
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  </channel>
</rss>

