topic Re: KE18F512VLH16 ECC RAM Single Bit Correction in Kinetis Microcontrollers

KE18F512VLH16 ECC RAM Single Bit Correction

rseigle77 — Thu, 13 Aug 2026 00:20:22 GMT

I have a follow up question related to @sean_dvorscak's post the other day (KE1 ECC RAM Single Bit Corrrection).

@Celeste_Liu replied,
->> If implementing an optional scrub, please align the access according to the actual access size or scrub granularity, not blindly to the raw MCM_LMFAR value. Also don't use a fixed 4-byte access unless you first align the address appropriately and confirm the access size is valid.

Can MCM_LMFATR[PEFSIZE] be used to determine the access size? If so, can this be used in tandem with MCM_LMFAR to implement a read-correct-writeback operation? For example, if MCM_LMFATR[PEFSIZE] is 3'b000 indicating an 8-bit access, can I perform an 8-bit read from the address indicated by MCM_LMFAR then perform an 8-bit write to the same address to correct the error. Similarly, if MCM_LMFATR[PEFSIZE] is 3'b010 indicating a 32-bit access, can I perform a 32-bit write to the address indicated by MCM_LMFAR without worrying about alignment?

Re: KE18F512VLH16 ECC RAM Single Bit Correction

Celeste_Liu — Tue, 18 Aug 2026 11:16:22 GMT

Hello @rseigle77 ,

I have seen your post. Let me spend some time investigating this issue, and I will get back to you once I have more information.

Celeste

Re: KE18F512VLH16 ECC RAM Single Bit Correction

Celeste_Liu — Wed, 19 Aug 2026 09:22:36 GMT

Hello @rseigle77 ,

Regarding your question, I need to escalate it to our internal team for further investigation. According to our process, please provide the end application name.

Thanks for your cooperation.

Celeste

Re: KE18F512VLH16 ECC RAM Single Bit Correction

rseigle77 — Wed, 19 Aug 2026 16:54:15 GMT

Hi @Celeste_Liu - P7 is the name of the end application.