<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>Kinetis Microcontrollers中的主题 Re: Using peripherals connected on Flexbus</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-peripherals-connected-on-Flexbus/m-p/161586#M682</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I guess I'm in much the same state as Jacob was in 2011 for I also expected a LDD for the FlexBus (ditto for the FlexMemory).&amp;nbsp; I don't see anything named "external bus" under the processor.&amp;nbsp; I'm not sure if this is because I'm using a different processor (I'm using a MK64FN1M0VLQ12) or if this represents a change in PE in the year since the previous post.&amp;nbsp; However, I do see an Init_FB (Init_FMC) component and am wondering if these two init modules represent all the support for the FlexBus and FlexMemory peripherals that are provided by Processor Expert?&amp;nbsp; Thanks!&lt;/P&gt;&lt;P&gt;p.s. I'm using PE version 10.3.0&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 14 Mar 2014 22:54:42 GMT</pubDate>
    <dc:creator>jvasil</dc:creator>
    <dc:date>2014-03-14T22:54:42Z</dc:date>
    <item>
      <title>Using peripherals connected on Flexbus</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-peripherals-connected-on-Flexbus/m-p/161583#M679</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;How do I define peripherals, or external RAM, that I want to be memory-mapped on the Flex-Bus? I cannot see an appropriate object in the Component Library of the CodeWarrior IDE. My peripheral has a 16-bit wide R/W connection on the flexbus and has 64 consecutive addressable registers. I need to set up base adress, wait states, and to define that I am using a 16-bit multiplexed address/data with an ALE pin. The configuration registers exist in the processor, and I can write directly to these, but I want to use the component library and its built-in checks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Aug 2011 02:02:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-peripherals-connected-on-Flexbus/m-p/161583#M679</guid>
      <dc:creator>deuteron</dc:creator>
      <dc:date>2011-08-24T02:02:57Z</dc:date>
    </item>
    <item>
      <title>Re: Using peripherals connected on Flexbus</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-peripherals-connected-on-Flexbus/m-p/161584#M680</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;#define MEM_BASE&amp;nbsp;&amp;nbsp; 0xA0000000L&amp;nbsp; //!&amp;lt; Starting address for&amp;nbsp;RAM&lt;/P&gt;&lt;P&gt;#define MEM_BASE_PTR&amp;nbsp; ((uint16_t *) FPGA_MEM_BASE)&lt;/P&gt;&lt;P&gt;uint16_t value;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;uint16_t&amp;nbsp; *mem = MEM_BASE_PTR;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;//write 1 to memory&lt;/P&gt;&lt;P&gt;mem[0] = 1;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;//write&amp;nbsp;2 to next memory&lt;/P&gt;&lt;P&gt;mem[1] = 2;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;//read out memory&lt;/P&gt;&lt;P&gt;value = mem[2];&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Sep 2011 23:58:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-peripherals-connected-on-Flexbus/m-p/161584#M680</guid>
      <dc:creator>keithgw</dc:creator>
      <dc:date>2011-09-22T23:58:29Z</dc:date>
    </item>
    <item>
      <title>Re: Using peripherals connected on Flexbus</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-peripherals-connected-on-Flexbus/m-p/161585#M681</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I wrote this question very early in my experience with Processor Expert. I was expecting to see an LDD (logical device driver) bean for the Flexbus, whereas it is in fact an option inside the CPU bean, called "external bus"&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 07 Jan 2013 11:44:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-peripherals-connected-on-Flexbus/m-p/161585#M681</guid>
      <dc:creator>deuteron</dc:creator>
      <dc:date>2013-01-07T11:44:06Z</dc:date>
    </item>
    <item>
      <title>Re: Using peripherals connected on Flexbus</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-peripherals-connected-on-Flexbus/m-p/161586#M682</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I guess I'm in much the same state as Jacob was in 2011 for I also expected a LDD for the FlexBus (ditto for the FlexMemory).&amp;nbsp; I don't see anything named "external bus" under the processor.&amp;nbsp; I'm not sure if this is because I'm using a different processor (I'm using a MK64FN1M0VLQ12) or if this represents a change in PE in the year since the previous post.&amp;nbsp; However, I do see an Init_FB (Init_FMC) component and am wondering if these two init modules represent all the support for the FlexBus and FlexMemory peripherals that are provided by Processor Expert?&amp;nbsp; Thanks!&lt;/P&gt;&lt;P&gt;p.s. I'm using PE version 10.3.0&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Mar 2014 22:54:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-peripherals-connected-on-Flexbus/m-p/161586#M682</guid>
      <dc:creator>jvasil</dc:creator>
      <dc:date>2014-03-14T22:54:42Z</dc:date>
    </item>
  </channel>
</rss>

