topic Bus fault when reading CnSC register from FTM1 channel 2 on MKV46 in Kinetis Microcontrollers

Bus fault when reading CnSC register from FTM1 channel 2 on MKV46

af_e71c — Fri, 31 Oct 2025 00:09:10 GMT

Hello,

I am using the NXP libraries to configure FTM1 on an MKV46F256VLL16 - but am getting a bus fault upon calling FTM_SetupInputCapture. This appears to occur during the read to the CnSC register for channel 2. Other registers and channels of the same FTM module are not affected. FTM_SetupInputCapture is called after FTM_Init, which enables the clock gates to the module. Note that the debugger is stopped due to a bus fault at FTM_SetupInputCapture below:

Inside FTM_SetupInputCapture:

The bus fault is marked as precise, and the BFAR is set to the address of FTM1 channel 2 CnSC, indicating that this is the access that caused the fault. Note that if the other FTM_SetupInputCapture line above was not commented out, the fault would still only occur when configuring the second channel.

My understanding is that reads of the CnSC register should be valid as long as the clock gate for FTM1 is enabled. I have also tried enabling the clock gate as shown below, and then reading the register - which also results in the same fault. This is done with interrupts disabled to eliminate the possibility of outside interference in the time domain. Any memory protection features remain at their default settings.

Any advice on how to address this issue would be much appreciated

Re: Bus fault when reading CnSC register from FTM1 channel 2 on MKV46

af_e71c — Mon, 03 Nov 2025 17:51:14 GMT

I believe I have found the problem... FTM1 channel 2 does not actually exist on this device. The datasheet shows that FTM1 has only two channels, 0 and 1:

The datasheet appears to cover all parts the reference manual covers - which seems to mean that the reference manual refers to registers that don't actually exist in any of the hardware.

Datasheet:

It's also worth noting that the pin configuration tool in MCUXpresso allows for configuring the I/O capture / control pin for FTM1 channel 2 - which is not documented in the datasheet - this creates further confusion about the (non) existence of FTM1 channel 2. My conclusion is that this part of the hardware does not exist - because it doesn't appear to actually work. It would be nice if the documentation would be updated to reflect that.

Re: Bus fault when reading CnSC register from FTM1 channel 2 on MKV46

Pablo_Ramos — Tue, 04 Nov 2025 22:42:08 GMT

Hi,

As you mentioned, FTM1 only has 2 channels. You can see the number of channels for each FTM instance in Table 39-1. FTM Instantiations of the KV4x Reference Manual.

I'm reviewing the comments you mentioned about the pin configuration tool. Are you referring to ConfigTools? Could you share with me how you were performing the initialization in the tool?

Best Regards,
Pablo