<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Information on PCC INUSE Field in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Information-on-PCC-INUSE-Field/m-p/2067082#M67394</link>
    <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/90401"&gt;@sean_dvorscak&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Thanks for your post. I have already understood your confusion. The description in the SDK is indeed strange. I have now contacted the NXP internal team to support us on this topic and I'm waiting for their feedback. I will keep you updated about any new relevant information.&lt;/P&gt;
&lt;P&gt;BRs,&lt;/P&gt;
&lt;P&gt;Celeste&lt;/P&gt;</description>
    <pubDate>Mon, 24 Mar 2025 08:56:10 GMT</pubDate>
    <dc:creator>Celeste_Liu</dc:creator>
    <dc:date>2025-03-24T08:56:10Z</dc:date>
    <item>
      <title>Information on PCC INUSE Field</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Information-on-PCC-INUSE-Field/m-p/2064159#M67387</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am looking for more information on the INUSE bit in the PCC registers.&lt;/P&gt;&lt;P&gt;The field in the Reference Manual of the KE1, says the bit indicates whether or not the peripheral is being used.&lt;/P&gt;&lt;P&gt;I ran some code waiting to see if the INUSE bit would set for a peripheral that I know was being used, and it never set.&lt;/P&gt;&lt;P&gt;I then looked in the SDK for the KE1 processor in Clocks.h, and saw the description of&amp;nbsp;CLOCK_IsEnabledByOtherCore. The description says it checks whether the clock is already enabled and configured by any other core, and it does this by checking if the INUSE bit is set.&lt;/P&gt;&lt;P&gt;So what is the INUSE bit really telling us? Is it being used by the Core that enabled it, or another core?&lt;/P&gt;&lt;P&gt;I am also confused on what it means by "Enabled and configured by another core"? I only have one Core in the Processor. Is this only for multi-core?&lt;/P&gt;</description>
      <pubDate>Wed, 19 Mar 2025 00:18:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Information-on-PCC-INUSE-Field/m-p/2064159#M67387</guid>
      <dc:creator>sean_dvorscak</dc:creator>
      <dc:date>2025-03-19T00:18:08Z</dc:date>
    </item>
    <item>
      <title>Re: Information on PCC INUSE Field</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Information-on-PCC-INUSE-Field/m-p/2067082#M67394</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/90401"&gt;@sean_dvorscak&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Thanks for your post. I have already understood your confusion. The description in the SDK is indeed strange. I have now contacted the NXP internal team to support us on this topic and I'm waiting for their feedback. I will keep you updated about any new relevant information.&lt;/P&gt;
&lt;P&gt;BRs,&lt;/P&gt;
&lt;P&gt;Celeste&lt;/P&gt;</description>
      <pubDate>Mon, 24 Mar 2025 08:56:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Information-on-PCC-INUSE-Field/m-p/2067082#M67394</guid>
      <dc:creator>Celeste_Liu</dc:creator>
      <dc:date>2025-03-24T08:56:10Z</dc:date>
    </item>
    <item>
      <title>Re: Information on PCC INUSE Field</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Information-on-PCC-INUSE-Field/m-p/2354189#M68320</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/90401"&gt;@sean_dvorscak&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;The INUSE bit prevents race conditions on dual-core devices. While this IP is shared across platforms, the bit's relevance varies: it's meaningless (and should be reserved) for the single-core KE1x series, but essential for the dual-core K32 series.&lt;/P&gt;
&lt;P&gt;Sorry for the inconvenience caused.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Celeste&lt;/P&gt;</description>
      <pubDate>Tue, 21 Apr 2026 10:07:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Information-on-PCC-INUSE-Field/m-p/2354189#M68320</guid>
      <dc:creator>Celeste_Liu</dc:creator>
      <dc:date>2026-04-21T10:07:53Z</dc:date>
    </item>
  </channel>
</rss>

