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    <title>topic Re: KL05 ADC Group B in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL05-ADC-Group-B/m-p/1660098#M65126</link>
    <description>&lt;P class="lia-align-justify"&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/166085"&gt;@matheus_pinto1&lt;/a&gt;,&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;In &lt;EM&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/kl-series-arm-cortex-m0-plus/kinetis-kl0x-48-mhz-entry-level-ultra-low-power-microcontrollers-mcus-based-on-arm-cortex-m0-plus-core:KL0x" target="_self"&gt;KL05Z Sub-Family Reference Manual&lt;/A&gt;. Chapter 28. Analog-to-Digital Converter (ADC). Section 28.3.3. ADC Configuration Register 2 (ADCx_CFG2)&lt;/EM&gt; mentions the usage of bit MUXSEL, which changes the ADC mux setting to select between alternate sets of ADC channels.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RaulRomero_0-1685464203928.png" style="width: 404px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225465i60B9B90A4117C050/image-dimensions/404x285?v=v2" width="404" height="285" role="button" title="RaulRomero_0-1685464203928.png" alt="RaulRomero_0-1685464203928.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;[KL05 Sub-Family Reference Manual. ADCx_CFG2 field descriptions]&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;Could you please try to configure this bit to Adxxb to be selected?&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;Best regards, Raul.&lt;/P&gt;</description>
    <pubDate>Tue, 30 May 2023 16:40:40 GMT</pubDate>
    <dc:creator>RaRo</dc:creator>
    <dc:date>2023-05-30T16:40:40Z</dc:date>
    <item>
      <title>KL05 ADC Group B</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL05-ADC-Group-B/m-p/1658017#M65114</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am using the FRDM-KL05Z board with ADC.&lt;/P&gt;&lt;P&gt;I acomplished to use ADC in single, continuous and hardware (TPM0) trigger modes.&lt;/P&gt;&lt;P&gt;However, when I try to set my channel for Group B, it is not work (doesn't set the COCO flag).&lt;/P&gt;&lt;P&gt;As far as I know, I just need to worry about a few things to choose between Group A and B:&lt;/P&gt;&lt;P&gt;- The ADC0-&amp;gt;S1[0] is for Group A and ADC0-&amp;gt;S1[1] is for Group B, for setting the channel;&lt;/P&gt;&lt;P&gt;- The ADC0-&amp;gt;R[0] is for Group A and ADC0-&amp;gt;R[1] is for Group B, for reading the conversion value;&lt;/P&gt;&lt;P&gt;- Group B can only be triggered by hardware.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;There is something I am missing?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;</description>
      <pubDate>Fri, 26 May 2023 02:23:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL05-ADC-Group-B/m-p/1658017#M65114</guid>
      <dc:creator>matheus_pinto1</dc:creator>
      <dc:date>2023-05-26T02:23:22Z</dc:date>
    </item>
    <item>
      <title>Re: KL05 ADC Group B</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL05-ADC-Group-B/m-p/1660098#M65126</link>
      <description>&lt;P class="lia-align-justify"&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/166085"&gt;@matheus_pinto1&lt;/a&gt;,&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;In &lt;EM&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/kl-series-arm-cortex-m0-plus/kinetis-kl0x-48-mhz-entry-level-ultra-low-power-microcontrollers-mcus-based-on-arm-cortex-m0-plus-core:KL0x" target="_self"&gt;KL05Z Sub-Family Reference Manual&lt;/A&gt;. Chapter 28. Analog-to-Digital Converter (ADC). Section 28.3.3. ADC Configuration Register 2 (ADCx_CFG2)&lt;/EM&gt; mentions the usage of bit MUXSEL, which changes the ADC mux setting to select between alternate sets of ADC channels.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="RaulRomero_0-1685464203928.png" style="width: 404px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/225465i60B9B90A4117C050/image-dimensions/404x285?v=v2" width="404" height="285" role="button" title="RaulRomero_0-1685464203928.png" alt="RaulRomero_0-1685464203928.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;[KL05 Sub-Family Reference Manual. ADCx_CFG2 field descriptions]&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;Could you please try to configure this bit to Adxxb to be selected?&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;Best regards, Raul.&lt;/P&gt;</description>
      <pubDate>Tue, 30 May 2023 16:40:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL05-ADC-Group-B/m-p/1660098#M65126</guid>
      <dc:creator>RaRo</dc:creator>
      <dc:date>2023-05-30T16:40:40Z</dc:date>
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