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    <title>topic Re: Kinetis / Latch input in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Kinetis-Latch-input/m-p/1615138#M64844</link>
    <description>&lt;P&gt;would be useful to have PORTx-&amp;gt;PCR[IRQC] options which don't produce interrupts or DMA&lt;/P&gt;</description>
    <pubDate>Tue, 14 Mar 2023 17:07:55 GMT</pubDate>
    <dc:creator>asapuntz</dc:creator>
    <dc:date>2023-03-14T17:07:55Z</dc:date>
    <item>
      <title>Kinetis / Latch input</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Kinetis-Latch-input/m-p/1612017#M64826</link>
      <description>&lt;P&gt;Looking at KE1xF (or S32K14x)&lt;/P&gt;&lt;P&gt;PORTx-&amp;gt;PCR[IRQC] allows an input pin to latch edges or levels which can then be read in&amp;nbsp;PORTx-&amp;gt;PCR[ISF] PORTx-&amp;gt;ISFR. This is very handy to avoid missing transitions while software is busy with other activities.&lt;/P&gt;&lt;P&gt;However, it seems that this will produce in an interrupt (or DMA) if any pin on PORTx is configured to do so.&lt;/P&gt;&lt;P&gt;I've seen other (Cortex-M4) processors where masking of such interrupts is configurable on a per-pin (rather than per-port) basis. Is this level of control not available?&lt;/P&gt;</description>
      <pubDate>Thu, 09 Mar 2023 01:19:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Kinetis-Latch-input/m-p/1612017#M64826</guid>
      <dc:creator>asapuntz</dc:creator>
      <dc:date>2023-03-09T01:19:48Z</dc:date>
    </item>
    <item>
      <title>Re: Kinetis / Latch input</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Kinetis-Latch-input/m-p/1615123#M64843</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/179051"&gt;@asapuntz&lt;/a&gt; , sorry, but no, it is not available&lt;/P&gt;</description>
      <pubDate>Tue, 14 Mar 2023 16:09:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Kinetis-Latch-input/m-p/1615123#M64843</guid>
      <dc:creator>CarlosGarabito</dc:creator>
      <dc:date>2023-03-14T16:09:04Z</dc:date>
    </item>
    <item>
      <title>Re: Kinetis / Latch input</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Kinetis-Latch-input/m-p/1615138#M64844</link>
      <description>&lt;P&gt;would be useful to have PORTx-&amp;gt;PCR[IRQC] options which don't produce interrupts or DMA&lt;/P&gt;</description>
      <pubDate>Tue, 14 Mar 2023 17:07:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Kinetis-Latch-input/m-p/1615138#M64844</guid>
      <dc:creator>asapuntz</dc:creator>
      <dc:date>2023-03-14T17:07:55Z</dc:date>
    </item>
    <item>
      <title>Re: Kinetis / Latch input</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Kinetis-Latch-input/m-p/1616019#M64847</link>
      <description>&lt;P&gt;We will consider it for new MCU designs, thank you.&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 18:02:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Kinetis-Latch-input/m-p/1616019#M64847</guid>
      <dc:creator>CarlosGarabito</dc:creator>
      <dc:date>2023-03-15T18:02:14Z</dc:date>
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