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    <title>topic Re: 64BM SDRAM on RT1052 in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/64BM-SDRAM-on-RT1052/m-p/1441404#M62859</link>
    <description>&lt;P&gt;For MT48LC16M16A2 (&lt;SPAN&gt;4M x 16 x 4&lt;/SPAN&gt;&lt;SPAN&gt;banks&lt;/SPAN&gt;) in EVK, we set SEMC_BR0 = 0x8000001B,&amp;nbsp;SEMC_SDRAMCR0 = 0xF01 (COL=9)&lt;/P&gt;
&lt;P&gt;For your IS42S16320F (&lt;SPAN&gt;8M x 16 x 4&lt;/SPAN&gt;&lt;SPAN&gt;banks&lt;/SPAN&gt;), it should be SEMC_BR0 = 0x8000001D,&amp;nbsp;SEMC_SDRAMCR0 = 0xE01 (COL=10)&lt;/P&gt;</description>
    <pubDate>Fri, 08 Apr 2022 15:27:34 GMT</pubDate>
    <dc:creator>jay_heng</dc:creator>
    <dc:date>2022-04-08T15:27:34Z</dc:date>
    <item>
      <title>64BM SDRAM on RT1052</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/64BM-SDRAM-on-RT1052/m-p/1440609#M62851</link>
      <description>&lt;P&gt;&amp;nbsp;Hi TIC,&lt;/P&gt;
&lt;P&gt;Prevas is designing on RT1052 based PCB, Where they need to use a 64MB SDRAM (ISSI IS42S16320F-6BLI, 16 bit data).&lt;/P&gt;
&lt;P&gt;Prevas are only able to address the first 32MB even though BR0-3 and SDRAMCR0-3 should be set up corectly.&lt;/P&gt;
&lt;P&gt;You find the setup below:&lt;/P&gt;
&lt;P&gt;BR0-8 is set to default value´s i.e. only SDRAM CS0 is activ, 64MB and started from 0x80000000 :&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.94, command: write_value, address: SEMC_BR0, value: 0x8000001D, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x1D,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.95, command: write_value, address: SEMC_BR1, value: 0x8400001C, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x14, 0x84, 0x00, 0x00, 0x1C,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.96, command: write_value, address: SEMC_BR2, value: 0x8800001C, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x18, 0x88, 0x00, 0x00, 0x1C,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.97, command: write_value, address: SEMC_BR3, value: 0x8C00001C, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x1C, 0x8C, 0x00, 0x00, 0x1C,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.98, command: write_value, address: SEMC_BR4, value: 0x9E00001A, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x20, 0x9E, 0x00, 0x00, 0x1A,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.99, command: write_value, address: SEMC_BR5, value: 0x90000018, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x24, 0x90, 0x00, 0x00, 0x18,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.100, command: write_value, address: SEMC_BR6, value: 0x98000018, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x28, 0x98, 0x00, 0x00, 0x18,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.101, command: write_value, address: SEMC_BR7, value: 0x9C00001A, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x2C, 0x9C, 0x00, 0x00, 0x1A,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.102, command: write_value, address: SEMC_BR8, value: 0x26, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x30, 0x00, 0x00, 0x00, 0x26,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Prevas only changed on COL (9-&amp;gt;10 bit) in SDRAMCR0, in relation to the demo projected for RT1052 EVK, since timing works for the first 32MB:&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.104, command: write_value, address: SEMC_SDRAMCR0, value: 0xE01, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x40, 0x00, 0x00, 0x0E, 0x01,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.105, command: write_value, address: SEMC_SDRAMCR1, value: 0x652922, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x44, 0x00, 0x65, 0x29, 0x22,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.106, command: write_value, address: SEMC_SDRAMCR2, value: 0x10920, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x48, 0x00, 0x01, 0x09, 0x20,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* #1.107, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A08, size: 4 */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x08,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Any suggestions on how to get the upper 32MB to be implemented correctly.&lt;/P&gt;
&lt;P&gt;/Jakob&lt;/P&gt;</description>
      <pubDate>Thu, 07 Apr 2022 13:16:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/64BM-SDRAM-on-RT1052/m-p/1440609#M62851</guid>
      <dc:creator>JRIIS</dc:creator>
      <dc:date>2022-04-07T13:16:47Z</dc:date>
    </item>
    <item>
      <title>Re: 64BM SDRAM on RT1052</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/64BM-SDRAM-on-RT1052/m-p/1441404#M62859</link>
      <description>&lt;P&gt;For MT48LC16M16A2 (&lt;SPAN&gt;4M x 16 x 4&lt;/SPAN&gt;&lt;SPAN&gt;banks&lt;/SPAN&gt;) in EVK, we set SEMC_BR0 = 0x8000001B,&amp;nbsp;SEMC_SDRAMCR0 = 0xF01 (COL=9)&lt;/P&gt;
&lt;P&gt;For your IS42S16320F (&lt;SPAN&gt;8M x 16 x 4&lt;/SPAN&gt;&lt;SPAN&gt;banks&lt;/SPAN&gt;), it should be SEMC_BR0 = 0x8000001D,&amp;nbsp;SEMC_SDRAMCR0 = 0xE01 (COL=10)&lt;/P&gt;</description>
      <pubDate>Fri, 08 Apr 2022 15:27:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/64BM-SDRAM-on-RT1052/m-p/1441404#M62859</guid>
      <dc:creator>jay_heng</dc:creator>
      <dc:date>2022-04-08T15:27:34Z</dc:date>
    </item>
    <item>
      <title>Re: 64BM SDRAM on RT1052</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/64BM-SDRAM-on-RT1052/m-p/1441408#M62860</link>
      <description>&lt;P&gt;Your configuration seems to be ok, can you please try SEMC_SDRAMCR0 = 0xF01 or 0xD01 to see what is happening then?&lt;/P&gt;</description>
      <pubDate>Fri, 08 Apr 2022 15:35:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/64BM-SDRAM-on-RT1052/m-p/1441408#M62860</guid>
      <dc:creator>jay_heng</dc:creator>
      <dc:date>2022-04-08T15:35:45Z</dc:date>
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