topic Re: Unusual interrupt behaviour in Kinetis Microcontrollers

Unusual interrupt behaviour

ve3id — Sun, 13 Mar 2022 16:02:27 GMT

I am building a digital modulator for a hand-held radio. When the transmit button is pushed, it triggers an interrupt on GPIOC bit 18. I have tested it with both of the edge triggers and also high-level triggers and it works fine. When I switch to low-level triggers it crashes as soon as it executes

NVIC_EnableIRQ(PORTC_IRQn);

The voltage on the pin is 2.1V whne the button is not pushed, so it is definitely recognising a HI as it interrupts fine when the button is not pressed and I set it to HI level trigger with the following instruction:

PORTC_PCR18 = 0xC0100;

(Yes, the PTT switch works backwards perfectly. So it must be recognising a true LO when the switch is pushed.

But why does it crash when I use:

PORTC_PCR18 = 0x80100; ???

*/ #include <stdio.h> #include "board.h" #include "peripherals.h" #include "pin_mux.h" #include "clock_config.h" #include "MK64F12.h" #include "fsl_debug_console.h" #include "GUMP.h" #include "frere.h" #include "stdint.h" //#include "inttypes.h" #include "stdio.h" #include "string.h" #include "fsl_dspi.h" // not found in mcuexpresso, taking chance of copying from KDS 2022 02 10 NWJ #include "board.h" #include "pin_mux.h" #include "clock_config.h" #define DSPI_MASTER_BASEADDR SPI1 #define DSPI_MASTER_CLK_SRC DSPI1_CLK_SRC #define DSPI_MASTER_CLK_FREQ CLOCK_GetFreq(DSPI1_CLK_SRC) #define DSPI_MASTER_IRQ SPI1_IRQn #define DSPI_MASTER_PCS kDSPI_Pcs0 #define DSPI_MASTER_IRQHandler SPI1_IRQHandler #define DSPI_SLAVE_BASEADDR SPI1 #define DSPI_SLAVE_IRQ SPI1_IRQn #define DSPI_SLAVE_IRQHandler SPI1_IRQHandler //#define TRANSFER_SIZE 256U // Transfer dataSize #define TRANSFER_SIZE 10 // Transfer dataSize #define TRANSFER_BAUDRATE 500000U // Transfer baudrate - 500k #define SPI_PUSHR_PCS0_ON 0x10000 #define SPI_PUSHR_PCS1_ON 0x20000 #define SPI_PUSHR_PCS2_ON 0x40000 #define SPI_PUSHR_PCS3_ON 0x80000 #define SPI_PUSHR_PCS4_ON 0x100000 #define SPI_PUSHR_PCS5_ON 0x200000 #define SPI_CTAR_FMSZ_8BIT 0x38000000 #define SPI_CTAR_FMSZ_16BIT 0x78000000 #define INIT 1 // arguments for the lcd routine #define UPDATE 2 // const char line1[]="Frere Radio "; const char line2[]="System V0.1 "; const char line1a[]="Copyright(c)2022"; const char line2a[]="Nigel W. Johnson"; const char line1b[]=" "; const char line2b[]=" "; unsigned char cmd = 0x01; unsigned char receiveBuffer[3]; uint8_t masterRxData[TRANSFER_SIZE] = {0U}; uint8_t masterTxData[TRANSFER_SIZE] = {0U}; uint8_t slaveRxData[TRANSFER_SIZE] = {0U}; uint8_t slaveTxData[TRANSFER_SIZE] = {0U}; volatile uint32_t slaveTxCount; volatile uint32_t slaveRxCount; volatile uint32_t masterTxCount; volatile uint32_t masterRxCount; volatile uint32_t masterCommand; uint32_t masterFifoSize; dspi_master_handle_t g_m_handle; dspi_slave_handle_t g_s_handle; volatile bool isTransferCompleted = false; //#pragma section m_data char RAM_line1[16]; char RAM_line2[16]; unsigned char a[16]; char *pointer; char temp; int char_Pos; // where we are in LCD line int dest; int i; unsigned int TxHex,RxHex; unsigned char TxHex1,TxHex2,TxHex3,TxHex4; // storage for raw data in hex and unpacked digits unsigned char RxHex1,RxHex2,RxHex3,RxHex4; // storage for raw data in hex and unpacked digits unsigned short ADC_read16b(void); unsigned short bADCData; void send_spi(void); void receive_spi(void); /* * @brief Application entry point. */ int main(void) { SIM_SCGC5 |= SIM_SCGC5_PORTC_MASK; /*Enable Port C Clock Gate Control*/ PORTC_PCR18 = 0x80100; /*PORTC_PC18: ISF=0,IRQC=A (Low-level trigger ,MUX=1 */ GPIOC_PDDR |= (0 << 18); /*Setting the bit 6 of the port C as Input*/ PORTC_ISFR = PORT_ISFR_ISF(0x40); /* Clear interrupt status flag */ NVIC_EnableIRQ(PORTC_IRQn); /*Enable the PORTC interrupt*/

Re: Unusual interrupt behaviour

Robin_Shen — Mon, 14 Mar 2022 03:31:10 GMT

What's the voltage of VDD? Why the voltage of PORTC18 is 2.1v when not pushed. If there is no external pull up resistor, then please enable the internal pull up resistor for PORTC18. (PORTx_PCRn[PE][PS]) You can refer the SDK example.(...\SDK_2_11_0_FRDM-K64F\boards\frdmk64f\driver_examples\gpio\input_interrupt)

Notice: If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared.

Please measure the voltage of PORTC18 by using oscilloscope, check the value meet the VIH VIL.

Best Regards,
Robin
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Re: Unusual interrupt behaviour

bobpaddock — Mon, 14 Mar 2022 12:42:33 GMT

There is an obscure foot note in the data sheet, that says the IRQ mode and GPIO mode configurations must match for that pin. There is no explanation as to what happens when they do not match. Perhaps we just found out?

Also an active low configuration will stay in that IRQ for as long as the input is low, unless the IRQ is disabled in the service routine. This could be causing something else to malfunction from not being serviced. I don't know what an active high configuration does. This is why edge trigger is usually used.

Switch bounce also needs to be accounted for, perhaps it is, didn't see it in the code snippet.

http://www.ganssle.com/debouncing.htm

Re: Unusual interrupt behaviour

ve3id — Mon, 14 Mar 2022 16:07:33 GMT

Thank you, Robin and Bob,

I have temporarily fixed the problem by:

if(GPIOC_PDIR & 0x40000)
PORTC_ISFR = PORT_ISFR_ISF(0x40000); // Clear bit 18 interrupt status flag
}

because there is nothing else needed to be done in the radio if the PTT button is pushed.

However, I'd like to make sure it is all clean - so the Vdd is 3.29V Hi logic on PTC-14 is 2.1V low is 50mV

With PE + PS set to 1 in the PCR, ViH is now 2.34V, but setting LO level for interrupt still crashes on startup.

Going back to PORTC_PCR18 = 0xA0103; restores workable operation.

I think for now I will leave it that way - no point in going into and out of ISR thousads of times when PTT pushed.