Input Edge Capture Mode Upper Limiting Frequency - K64F

Joshua_ZXR — Mon, 25 Oct 2021 05:21:16 GMT

Dear NXP stuff,

Now I have face one issue which has posted on another question ( has not been solved )

Re: FTM Input capture mode ( single edge / dual ed... - NXP Community

My BUS clock has been set to 60MHz and MCGFFCLK is 15MHz

and I am using FTM edge capture mode with eDMA to measure a input signal frequency.

according to the document "K64 Sub-Family Reference Manual" Kinetis K64: 120MHz Cortex-M4F up to 1MB Flash 100-144pin (mouser.com)

Chapter 40.4.4 : "Note that the maximum frequency for the channel input signal to be
detected correctly is system clock divided by 4, which is required to meet Nyquist criteria
for signal sampling."

So My understanding is the upper limiting frequency should be 60/4 = 15MHz

But base on my testing, captured value become unexpected once the frequency exceed 7MHz ( such as input signal is 8MHz, but calculated frequency is 4MHz base on captured result)

And one more issue is, interrupt cannot be generated once input frequency exceed 10MHz.

No matter 10MHz or 7MHz, they are much different with the document mentioned 15MHz. That makes me quite confused.

the source code has been attached

Please kindly assist, thanks

Thanks & Best Regards

Joshua

Re: Input Edge Capture Mode Upper Limiting Frequency - K64F

FelipeGarcia — Wed, 03 Nov 2021 16:11:12 GMT

This is a duplicated thread that is being handled here: FTM Input capture mode ( single edge / dual edge c... - NXP Community

topic Re: Input Edge Capture Mode Upper Limiting Frequency - K64F in Kinetis Microcontrollers

Input Edge Capture Mode Upper Limiting Frequency - K64F

Re: Input Edge Capture Mode Upper Limiting Frequency - K64F