https://community.nxp.com/t5/Kinetis-Microcontrollers/K64F-maxclock-input-source-for-ADC16-and-ADHSC/m-p/1223728#M59477 <P>Hi ffonck,</P> <P>Yes, if you don't care about convert accuracy, you can set this bit to zero. The additional 2 clock is used by ADC internal comparator circuit for auto-zero. It allow enough settling time when the ADC clock is fast. Without this 2 clock, previous ADC sampling channel may interfere current channel.</P> <P>&nbsp;</P> <P>Regards,</P> <P>Jing&nbsp;</P> Mon, 01 Feb 2021 04:14:08 GMT jingpan 2021-02-01T04:14:08Z https://community.nxp.com/t5/Kinetis-Microcontrollers/K64F-maxclock-input-source-for-ADC16-and-ADHSC/m-p/1222898#M59467 <P>I've been trying to achieve max clock<SPAN class="fontstyle0"> input for the ADC16 </SPAN>in a <SPAN class="fontstyle0">MK64FX512Vxx12. According to datasheet <A href="https://www.nxp.com/docs/en/data-sheet/K64P144M120SF5.pdf" target="_blank" rel="nofollow noopener noreferrer">K64F Sub-Family Data Sheet</A> this value shouldn't be higher than 18Mhz and ADHSC&nbsp;(High speed conversion) must be set for high frequency clocks:</SPAN></P><P><SPAN class="fontstyle0"><span class="lia-inline-image-display-wrapper lia-image-align-center" image-alt="asdqsdqd.png" style="width: 827px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/136035iB9B79DF5B373D38F/image-dimensions/827x157?v=v2" width="827" height="157" role="button" title="asdqsdqd.png" alt="asdqsdqd.png" /></span></SPAN></P><P>But, <A href="https://www.nxp.com/pages/adc-calculator:ADC_CALCULATOR" target="_blank">https://www.nxp.com/pages/adc-calculator:ADC_CALCULATOR</A> on the "instructions" section says:</P><P><span class="lia-inline-image-display-wrapper lia-image-align-center" image-alt="índice.jpg" style="width: 828px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/136033i2B73F9485655C10F/image-dimensions/828x60?v=v2" width="828" height="60" role="button" title="índice.jpg" alt="índice.jpg" /></span></P><P>So, can I clear ADHSC to maximize sample rate in spite of performance, or is it mandatory to used ADHSC at maximum clock frequency?</P><P>If it is mandatory, above what frequency does ADHSC need to be set?</P><P>&nbsp;</P> Thu, 28 Jan 2021 22:13:12 GMT https://community.nxp.com/t5/Kinetis-Microcontrollers/K64F-maxclock-input-source-for-ADC16-and-ADHSC/m-p/1222898#M59467 ffonck 2021-01-28T22:13:12Z https://community.nxp.com/t5/Kinetis-Microcontrollers/K64F-maxclock-input-source-for-ADC16-and-ADHSC/m-p/1223728#M59477 <P>Hi ffonck,</P> <P>Yes, if you don't care about convert accuracy, you can set this bit to zero. The additional 2 clock is used by ADC internal comparator circuit for auto-zero. It allow enough settling time when the ADC clock is fast. Without this 2 clock, previous ADC sampling channel may interfere current channel.</P> <P>&nbsp;</P> <P>Regards,</P> <P>Jing&nbsp;</P> Mon, 01 Feb 2021 04:14:08 GMT https://community.nxp.com/t5/Kinetis-Microcontrollers/K64F-maxclock-input-source-for-ADC16-and-ADHSC/m-p/1223728#M59477 jingpan 2021-02-01T04:14:08Z