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    <title>topic Re: MKE02Z64VLD2 - FOPT Register Description in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1184917#M58864</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/78470"&gt;@satbir7&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;indeed, the FOPT description is very minimal:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_0-1605677045280.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130335i3450CAC968440EB4/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_0-1605677045280.png" alt="ErichS_0-1605677045280.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;taken from the RM here:&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/ke-series-cortex-m4-m0-plus/kinetis-ke02-40-mhz-entry-level-microcontrollers-mcus-based-on-arm-cortex-m0-plus-core:KE02_40?tab=Documentation_Tab" target="_blank" rel="noopener"&gt;https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/ke-series-cortex-m4-m0-plus/kinetis-ke02-40-mhz-entry-level-microcontrollers-mcus-based-on-arm-cortex-m0-plus-core:KE02_40?tab=Documentation_Tab&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_0-1605676621474.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130332i62FB78A3F77574E8/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_0-1605676621474.png" alt="ErichS_0-1605676621474.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;If it follows other Kinetis devices (not sure), then it is a mirror of the SIM_SOPT:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_1-1605676648036.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130333i715BAF3E58772227/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_1-1605676648036.png" alt="ErichS_1-1605676648036.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_2-1605676679064.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130334iC696113152AFB23E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_2-1605676679064.png" alt="ErichS_2-1605676679064.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I don't have a KE, but for all the Kinetis devices I use I have to configure and store the FOPT in the boot/flash configuration configuration area, see&amp;nbsp;&lt;A href="https://mcuoneclipse.com/2020/06/09/disabling-nmi-non-maskable-interrupt-pin/" target="_blank" rel="noopener"&gt;https://mcuoneclipse.com/2020/06/09/disabling-nmi-non-maskable-interrupt-pin/&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I hope this helps,&lt;/P&gt;&lt;P&gt;Erich&lt;/P&gt;</description>
    <pubDate>Wed, 18 Nov 2020 05:25:05 GMT</pubDate>
    <dc:creator>ErichStyger</dc:creator>
    <dc:date>2020-11-18T05:25:05Z</dc:date>
    <item>
      <title>MKE02Z64VLD2 - FOPT Register Description</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1184744#M58860</link>
      <description>&lt;P&gt;Hello All,&lt;/P&gt;&lt;P&gt;The BIT description for the FOPT Register is not found in the KE02 Sub-Family Reference Manual .&lt;/P&gt;&lt;P&gt;How can one disable the NMI option at power up?&lt;/P&gt;&lt;P&gt;I have already disabled it in the&amp;nbsp;&amp;nbsp;SIM-&amp;gt;SOPT register, but the&amp;nbsp; NMI still fires&amp;nbsp; at Power UP intermittently.&lt;/P&gt;&lt;P&gt;There is a 4.7K Pull UP on the&amp;nbsp; Pin along with a 47nF capacitor.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Satbir&lt;/P&gt;</description>
      <pubDate>Tue, 17 Nov 2020 22:44:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1184744#M58860</guid>
      <dc:creator>satbir7</dc:creator>
      <dc:date>2020-11-17T22:44:16Z</dc:date>
    </item>
    <item>
      <title>Re: MKE02Z64VLD2 - FOPT Register Description</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1184917#M58864</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/78470"&gt;@satbir7&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;indeed, the FOPT description is very minimal:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_0-1605677045280.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130335i3450CAC968440EB4/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_0-1605677045280.png" alt="ErichS_0-1605677045280.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;taken from the RM here:&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/ke-series-cortex-m4-m0-plus/kinetis-ke02-40-mhz-entry-level-microcontrollers-mcus-based-on-arm-cortex-m0-plus-core:KE02_40?tab=Documentation_Tab" target="_blank" rel="noopener"&gt;https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/ke-series-cortex-m4-m0-plus/kinetis-ke02-40-mhz-entry-level-microcontrollers-mcus-based-on-arm-cortex-m0-plus-core:KE02_40?tab=Documentation_Tab&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_0-1605676621474.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130332i62FB78A3F77574E8/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_0-1605676621474.png" alt="ErichS_0-1605676621474.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;If it follows other Kinetis devices (not sure), then it is a mirror of the SIM_SOPT:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_1-1605676648036.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130333i715BAF3E58772227/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_1-1605676648036.png" alt="ErichS_1-1605676648036.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_2-1605676679064.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130334iC696113152AFB23E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_2-1605676679064.png" alt="ErichS_2-1605676679064.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I don't have a KE, but for all the Kinetis devices I use I have to configure and store the FOPT in the boot/flash configuration configuration area, see&amp;nbsp;&lt;A href="https://mcuoneclipse.com/2020/06/09/disabling-nmi-non-maskable-interrupt-pin/" target="_blank" rel="noopener"&gt;https://mcuoneclipse.com/2020/06/09/disabling-nmi-non-maskable-interrupt-pin/&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I hope this helps,&lt;/P&gt;&lt;P&gt;Erich&lt;/P&gt;</description>
      <pubDate>Wed, 18 Nov 2020 05:25:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1184917#M58864</guid>
      <dc:creator>ErichStyger</dc:creator>
      <dc:date>2020-11-18T05:25:05Z</dc:date>
    </item>
    <item>
      <title>Re: MKE02Z64VLD2 - FOPT Register Description</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1184934#M58865</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/78470"&gt;@satbir7&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;what I usually do in such situations is checking the code in Processor Expert.&lt;/P&gt;&lt;P&gt;See&amp;nbsp;&lt;A href="https://mcuoneclipse.com/2014/04/18/pin-muxing-using-the-nmi-pin-as-gpio-pin/" target="_blank"&gt;https://mcuoneclipse.com/2014/04/18/pin-muxing-using-the-nmi-pin-as-gpio-pin/&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;KE02 is supported (e.g. in Kinetis Design Studio): there is a setting to disable the NMI:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_1-1605677633531.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130337i90213176D628C232/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_1-1605677633531.png" alt="ErichS_1-1605677633531.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;It seems that indeed this does not change the NV_FOPT and the bits remain all 1:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_3-1605677898370.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130340i75D36E6BD452210D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_3-1605677898370.png" alt="ErichS_3-1605677898370.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;But what it does it changes the SIM_SOPT:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ErichS_2-1605677767421.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130338iF9FFAC87D1BC67A0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ErichS_2-1605677767421.png" alt="ErichS_2-1605677767421.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Because I don't have a KE device I'm not able to test it. I have attached the project I have generated with Processor Expert for you.&lt;/P&gt;&lt;P&gt;I hope this helps,&lt;/P&gt;&lt;P&gt;Erich&lt;/P&gt;</description>
      <pubDate>Wed, 18 Nov 2020 05:40:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1184934#M58865</guid>
      <dc:creator>ErichStyger</dc:creator>
      <dc:date>2020-11-18T05:40:28Z</dc:date>
    </item>
    <item>
      <title>Re: MKE02Z64VLD2 - FOPT Register Description</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1185328#M58872</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/17173"&gt;@ErichStyger&lt;/a&gt;&amp;nbsp;!&lt;/P&gt;&lt;P&gt;Thank you so much for replying to this post.&lt;/P&gt;&lt;P&gt;Before posting here I was doing some research&amp;nbsp; and found your page that you linked.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Very helpful information, but&amp;nbsp; I am afraid it&amp;nbsp; does not apply to my situation.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I almost Secured the MCU, but luckily it only enabled the&amp;nbsp; Flash Protection.&lt;/P&gt;&lt;P&gt;The MCU you have mentioned in that example has the&amp;nbsp; FOPT register&amp;nbsp; at different address than the one I am using.&amp;nbsp;&lt;/P&gt;&lt;P&gt;May be the NXP's documentation department can shed some light&amp;nbsp; on it.&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Satbir&lt;/P&gt;</description>
      <pubDate>Wed, 18 Nov 2020 16:23:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1185328#M58872</guid>
      <dc:creator>satbir7</dc:creator>
      <dc:date>2020-11-18T16:23:15Z</dc:date>
    </item>
    <item>
      <title>Re: MKE02Z64VLD2 - FOPT Register Description</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1186404#M58881</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;A id="link_34" class="lia-link-navigation lia-page-link lia-user-name-link" href="https://community.nxp.com/t5/user/viewprofilepage/user-id/78470" target="_self"&gt;&lt;SPAN class=""&gt;satbir7&lt;/SPAN&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;To KE0x chip, the NMI can't be disabled during POR. It just can be disabled in&amp;nbsp;&lt;SPAN&gt;SIM-&amp;gt;SOPT register, and this register control just can be done in the code.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; So, in the POR phase, your NMI pin is still the NMI function, that means, you need to make sure the external NMI pin input signal is high, otherwise, it will influence your MCU boot.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Kerry&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 20 Nov 2020 04:25:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1186404#M58881</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2020-11-20T04:25:01Z</dc:date>
    </item>
    <item>
      <title>Re: MKE02Z64VLD2 - FOPT Register Description</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1186903#M58889</link>
      <description>&lt;P&gt;Hi Kerry Zhou,&lt;/P&gt;&lt;P&gt;Thank you &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/60336"&gt;@kerryzhou&lt;/a&gt;&amp;nbsp; for confirming my doubt!!&lt;/P&gt;&lt;P&gt;Satbir&lt;/P&gt;</description>
      <pubDate>Fri, 20 Nov 2020 22:50:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1186903#M58889</guid>
      <dc:creator>satbir7</dc:creator>
      <dc:date>2020-11-20T22:50:15Z</dc:date>
    </item>
    <item>
      <title>Re: MKE02Z64VLD2 - FOPT Register Description</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1186999#M58893</link>
      <description>&lt;P&gt;You are welcome!&lt;/P&gt;
&lt;P&gt;Any new questions in the future, welcome to create the new question post.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;</description>
      <pubDate>Sun, 22 Nov 2020 04:03:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1186999#M58893</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2020-11-22T04:03:28Z</dc:date>
    </item>
    <item>
      <title>Re: MKE02Z64VLD2 - FOPT Register Description</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1200572#M59125</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I used a way, maybe can help you if you dont disabled NMI interrupt.&lt;/P&gt;&lt;P&gt;But the correct is disable NMI pin in CPU configuration (remember to switch to advanced mode)&lt;/P&gt;&lt;P&gt;and use a external pull-up in this pin, thats is recommended in User Guide.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="rafaeltoledo_0-1608141903762.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/132885i68F1E08ACEB6F116/image-size/medium?v=v2&amp;amp;px=400" role="button" title="rafaeltoledo_0-1608141903762.png" alt="rafaeltoledo_0-1608141903762.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;in Events.c file:&lt;/P&gt;&lt;P&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;/*&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;** ===================================================================&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;** Event : Cpu_OnNMIINT (module Events)&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;**&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;** Component : Cpu [MKE02Z64QH2]&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;*/&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;/*!&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;** @brief&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;** This event is called when the Non maskable interrupt had&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;** occurred. This event is automatically enabled when the [NMI&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;** interrupt] property is set to 'Enabled'.&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;*/&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT color="#008000"&gt;&lt;EM&gt;/* ===================================================================*/&lt;/EM&gt;&lt;/FONT&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT color="#800080"&gt;void&lt;/FONT&gt; Cpu_OnNMIINT(&lt;FONT color="#800080"&gt;void&lt;/FONT&gt;)&lt;/STRONG&gt; {&lt;BR /&gt;&lt;FONT color="#008000"&gt;/* Write your code here ... */&lt;/FONT&gt;&lt;BR /&gt;SIM_SOPT = (uint32_t)((SIM_SOPT &amp;amp; (uint32_t)~(uint32_t)(&lt;BR /&gt;SIM_SOPT_CLKOE_MASK |&lt;BR /&gt;SIM_SOPT_NMIE_MASK&lt;BR /&gt;)) | (uint32_t)(&lt;BR /&gt;SIM_SOPT_RSTPE_MASK&lt;BR /&gt;));&lt;BR /&gt;}&lt;/P&gt;</description>
      <pubDate>Wed, 16 Dec 2020 18:09:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/MKE02Z64VLD2-FOPT-Register-Description/m-p/1200572#M59125</guid>
      <dc:creator>rafaeltoledo</dc:creator>
      <dc:date>2020-12-16T18:09:34Z</dc:date>
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