Interface MPC860 with Micron SDRAM [MT48LC8M16A2TG]

balaji76 — Tue, 18 Feb 2014 06:38:47 GMT

Dear All,

I am using the processor MPC860 and interface with SDRAM [8MB]. Using external clock[66MHz], the initialization for SDRAM and chip select CS1.

writemmr BR0	0xFFF00001 # BR0 - Boot Flash starts at 0xFFF00000
writemmr OR0	0xFFF00074 # OR0 - SIZE OF THE BOOT FLASH IS 1MBYTE

writemmr BR1	0x00000081 # BR1 - SDRAM starts at 0x00000000
writemmr OR1	0xFF000800 # OR1 - SIZE OF THE SRAM IS 16MBYTEs

#writemmr BR7	0x00000801 # BR2 - ram starts at 0x20000401
#writemmr OR7	0xFFF00074

I commented BR7 and OR7 for RAM functionality and enable the SDRAM. Load the configure file for erase and programming. when try to erase the flash, only chip select 1 signal is correct. other than that SD_WE#, OE# signals are tri-state. I don't know why it is coming like that? Bank Select configured for A7 and A8.

Can you check it and mail me? I am eager to waiting for your reply.

Thanking you,

Regards

Balaji

Re: Interface MPC860 with Micron SDRAM [MT48LC8M16A2TG]

alexander_yakov — Sat, 22 Feb 2014 09:44:36 GMT

The initialization of only BR1 and OR1 is not enough to initialize SDRAM on chip select CS1.

Please refer to application note AN2066 for MPC8xx SDRAM interface inplementation

http://cache.freescale.com/files/netcomm/doc/app_note/AN2066.pdf

Kinetis MicrocontrollersのトピックInterface MPC860 with Micron SDRAM [MT48LC8M16A2TG]

Interface MPC860 with Micron SDRAM [MT48LC8M16A2TG]

Re: Interface MPC860 with Micron SDRAM [MT48LC8M16A2TG]