Kinetis MicrocontrollersのトピックRe: K60 NXP SPI problem

K60 NXP SPI problem

mdrasool_yadwad — Tue, 20 Oct 2020 07:01:26 GMT

Hello Sir,

I attached document please check it once. In SPI0 the document of tower board is showing chip select 4 as Output. What does it mean we cant able to write or read

Re: K60 NXP SPI problem

kerryzhou — Tue, 20 Oct 2020 08:28:23 GMT

Hi mdrasool_yadwad,

SPI CS pin output is to the master, it is used to select the slave chip in the SPI modules.

So, you just can consider one SPI0 has several CS pins, CS4 is just one external slave SPI chip select pins.

Wish it helps you!

If you still have questions about it, please kindly let me know!

Best Regards,

Kerry

-------------------------------------------------------------------------------

Note:

- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored

Please open a new thread and refer to the closed one, if you have a related question at a later point in time.

-----------------------------------------------------------------------------

Re: K60 NXP SPI problem

mdrasool_yadwad — Tue, 20 Oct 2020 10:51:04 GMT

I am enable to read the correct data by using the SPI. Below is my code please check it once. I am getting garbage data

/* SPI config

// disable SPI
spiDisable(SPI0);

// enabling master mode and disable tx and rx,and clear rx,tx
SPI_MCR_REG(SPI0) |= (SPI_MCR_MSTR_MASK | SPI_MCR_ROOE_MASK | SPI_MCR_DIS_RXF_MASK | SPI_MCR_DIS_TXF_MASK | SPI_MCR_CLR_TXF_MASK | (SPI_MCR_CLR_RXF_MASK) );
SPI_MCR_REG(SPI0) |= SPI_MCR_PCSIS(1U); //-->Peripheral Chip Select is Inactive Low

// End of SpiEnableREeceiver
SPI_MCR_REG(spi) |= (1U<<SPI_MCR_ROOE_SHIFT);

// Frame size 8Bit **frame is equal to the FMSZ field value plus 1.
SPI_CTAR_REG(SPI0,0) = SPI_CTAR_FMSZ(7);

// set baudrate different frequency like 500khz
SPI_CTAR_REG(SPI0,0) |= SPI_CTAR_PBR(1U);//prescalar-3
SPI_CTAR_REG(SPI0,0) |= SPI_CTAR_BR(4U);//baud SCALAR factor-32
SPI_CTAR_REG(SPI0,0) |= (0U << SPI_CTAR_DBR_SHIFT);//value set to 0

// clock phase,polarity 0,msb first then 0 (LSBFE)
SPI_CTAR_REG(SPI0,0) &= ~(SPI_CTAR_CPHA_MASK | SPI_CTAR_CPOL_MASK | SPI_CTAR_LSBFE_MASK);

// Delay After Transfer Scaler ,ASC-ACK delay scalar,CSSCK-SCK delay,PCSSCK-PCS to SCK Delay Prescaler,PASC-After SCK Delay Prescaler,PDT-Delay after Transfer Prescaler
SPI_CTAR_REG(SPI0,0) |= (SPI_CTAR_DT(5U) | SPI_CTAR_ASC(5U) | SPI_CTAR_CSSCK(5U) | SPI_CTAR_PCSSCK(0U) | SPI_CTAR_PASC(0U) | SPI_CTAR_PDT(0U));
SPI_PUSHR_REG(SPI0) =SPI_PUSHR_PCS(1<<4);
spiEnable(SPI0);

*/End

/* SPI Write

void DAC_AD5724(int data)
{
SPI_Start();

uint8_t i=0;
i=data;

SPI0_PUSHR = SPI_PUSHR_CONT_MASK|SPI_PUSHR_CTAS(0x01)|(SPI_PUSHR_PCS(1<<4))|SPI_PUSHR_TXDATA(0x02);

SPI0_PUSHR =SPI_PUSHR_TXDATA(i);

while(!(SPI0_SR & SPI_SR_TCF_MASK ));
SPI0_SR |= SPI_SR_TCF_MASK;

SPI0_PUSHR |= SPI_PUSHR_TXDATA(data>>8);
while(!(SPI0_SR & SPI_SR_TCF_MASK ));
SPI0_SR |= SPI_SR_TCF_MASK;

SPI0_PUSHR|=SPI_PUSHR_TXDATA(data);
while(!(SPI0_SR & SPI_SR_TCF_MASK ));
SPI0_SR |= SPI_SR_TCF_MASK;

SPI_Stop();

*/Write End

/*SPI Read

SPI_Start(); // Reading the data from the 23lcv1024

SPI0_PUSHR=SPI_PUSHR_PCS(1<<4)|SPI_PUSHR_CTAS(0x01)|SPI_PUSHR_TXDATA(0x03);
SPI0_PUSHR|=SPI_PUSHR_TXDATA(0x03);
while(!(SPI0_SR & SPI_SR_TCF_MASK ));
SPI0_SR |= SPI_SR_TCF_MASK;

SPI0_PUSHR |= SPI_PUSHR_TXDATA(0x00);
while(!(SPI0_SR & SPI_SR_TCF_MASK ));
SPI0_SR |= SPI_SR_TCF_MASK;

SPI0_PUSHR|= SPI_PUSHR_TXDATA(0x00);

while(!(SPI0_SR & SPI_SR_TCF_MASK ));
SPI0_SR |= SPI_SR_TCF_MASK;

SPI0_PUSHR |= SPI_PUSHR_TXDATA(0x10);
while(!(SPI0_SR & SPI_SR_TCF_MASK ));
SPI0_SR |= SPI_SR_TCF_MASK;

a = SPI0_POPR;

SPI_Stop();

*/READ End

Re: K60 NXP SPI problem

nxf56274 — Wed, 21 Oct 2020 01:04:08 GMT

Hi,

A suggestion is that do not use the default pin for pcs. You can use any pin configured as gpio to make the pin as cs. Here is the reason. When start transfer, the cs will be low automatically. Then you send one byte, the cs will be high automatically. But sometimes the master should send continuous several bytes. In this time, the cs should hold low. Due to you can't control the cs, your communication will fail. Another suggestion is that use sdk. The attachment is a project reading w25q. It uses gpio to control cs. You can use refer this.

Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 days after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

Re: K60 NXP SPI problem

mdrasool_yadwad — Wed, 21 Oct 2020 06:58:54 GMT

You mean to say we cant control CS using registers.

Re: K60 NXP SPI problem

nxf56274 — Wed, 21 Oct 2020 07:11:53 GMT

Hi,

Using gpio is more convenient and flexible.

Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

Re: K60 NXP SPI problem

mdrasool_yadwad — Thu, 22 Oct 2020 03:24:46 GMT

Thanks for your response.

One more doubt I am using SPI available on port C whether I have to use CS of same port or any of the gpio can be configures as CS to operate the SPI

Re: K60 NXP SPI problem

nxf56274 — Thu, 22 Oct 2020 05:36:13 GMT

Hi,

Any gpio is ok. gpio is not controlled by spi. You can refer the attachment I sent to you.

Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

Re: K60 NXP SPI problem

mdrasool_yadwad — Thu, 22 Oct 2020 06:17:15 GMT

Like wise in your attachment you have used SPI0 of port D (93,94,95,96 pins), 93-CS you made as normal GPIO of same port D.

This is my doubt whether i have to use the same port CS as gpio or any of the pin as GPIO and use as CS.

When i use any of pin as GPIO and CS i m not getting the correct data

Re: K60 NXP SPI problem

nxf56274 — Fri, 23 Oct 2020 00:56:25 GMT

Hi,

This means your code may have some problems. You have to use oscilloscope to check the spi timing.

Have a great day,
TIC

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

Re: K60 NXP SPI problem

mdrasool_yadwad — Fri, 23 Oct 2020 03:20:10 GMT

I have checked that also but data is not proper.