Kinetis MicrocontrollersのトピックRe: UART DMA Configuration

UART DMA Configuration

mdrasool_yadwad — Tue, 13 Oct 2020 10:16:08 GMT

Hello

Guys I could not able to configure for Uart Dma. Can anyone please explain how it should be done.

i am getting very confused

Re: UART DMA Configuration

daweiyou — Tue, 13 Oct 2020 10:29:54 GMT

Hi:

I have no Kinetis sample code document, you could search on NXP.com for some kinetis related AN.

But I could see AN for i.MXRT, which has same UART/DMA IP with kinetis. you could refer the attached AN and sample code based on SDK.

Re: UART DMA Configuration

mdrasool_yadwad — Tue, 13 Oct 2020 11:10:44 GMT

Can you explain in detail about minor and major loop

Re: UART DMA Configuration

mjbcswitzerland — Tue, 13 Oct 2020 12:05:17 GMT

Kinetis DMA UART reception is explained in some detail in these two video guides:

https://www.youtube.com/watch?v=dNZvvouiqis&list=PLWKlVb_MqDQFZAulrUywU30v869JBYi9Q&index=10

https://www.youtube.com/watch?v=GaoWE-tMRq4&list=PLWKlVb_MqDQFZAulrUywU30v869JBYi9Q&index=11

There is a complete UART (Tx and Rx) DMA implementation for all Kinetis parts, with eDMA or simple DMA controllers (like in most KL parts), on UARTs and LPUARTs in the open source uTasker project at https://github.com/uTasker/uTasker-Kinetis
UART user's guide: https://www.utasker.com/docs/uTasker/uTaskerUART.PDF

It also simulates the UART and its DMA operation in Visual Studio for simple understanding of the underlying operations.

Regards

Mark
[uTasker project developer for Kinetis and i.MX RT]
Contact me by personal message or on the uTasker web site to discuss professional training, solutions to problems or product development requirements

Re: UART DMA Configuration

mdrasool_yadwad — Wed, 14 Oct 2020 03:39:44 GMT

Thank you for your response. I want to know the major difference between minor loop and major loop. Can you explain that.

Re: UART DMA Configuration

mjbcswitzerland — Wed, 14 Oct 2020 11:34:30 GMT

For your use you need the minor loop to be set to 1 so that there is a single DMA transfer each time the Tx buffer is empty.

For other applications it is possible for the minor loop to be set to a higher value so that each DMA trigger (of the major loop which defines after how many triggers the complete operation terminates) causes a multiple of minor loop transfers to be executed.

As I noted in the first line, the UART needs the minor loop to be set to 1 and the major loop defines how many bytes would be sent in total..

Most peripherals (without FIFOs) need the manor loop set to 1 otherwise there will be buffer under or overrun if multiple fast transfers are performed.

* Note however that the eDMA counters are in bytes and so the above is true for byte oriented peripherals. Long word oriented peripherals would, for example, in fact use the value 4 (4 bytes) instead of 1.

Regards