topic PK70FN1M0VMJ12 Memory controller in Kinetis Microcontrollers https://community.nxp.com/t5/Kinetis-Microcontrollers/PK70FN1M0VMJ12-Memory-controller/m-p/160151#M583 <HTML><HEAD></HEAD><BODY><P>I am not using the memory controller on the PK70FN1M0VMJ12, is there any special considerations to take into account with the setup of the pins related to the memory controller? i.e. DDR_VDD, DDR_VSS, DDR_A0..A14, DDRDQ</P></BODY></HTML> Wed, 31 Oct 2012 14:44:31 GMT chucktodd 2012-10-31T14:44:31Z PK70FN1M0VMJ12 Memory controller https://community.nxp.com/t5/Kinetis-Microcontrollers/PK70FN1M0VMJ12-Memory-controller/m-p/160151#M583 <HTML><HEAD></HEAD><BODY><P>I am not using the memory controller on the PK70FN1M0VMJ12, is there any special considerations to take into account with the setup of the pins related to the memory controller? i.e. DDR_VDD, DDR_VSS, DDR_A0..A14, DDRDQ</P></BODY></HTML> Wed, 31 Oct 2012 14:44:31 GMT https://community.nxp.com/t5/Kinetis-Microcontrollers/PK70FN1M0VMJ12-Memory-controller/m-p/160151#M583 chucktodd 2012-10-31T14:44:31Z Re: PK70FN1M0VMJ12 Memory controller https://community.nxp.com/t5/Kinetis-Microcontrollers/PK70FN1M0VMJ12-Memory-controller/m-p/160152#M584 <HTML><HEAD></HEAD><BODY><P>These are the only considerations:</P><P></P><P>1) Disabling DDR_DQx signals</P><P>2) Driving DDR_VSS, DDR_VSS and DDR_Ax pins low by connecting them to gnd</P></BODY></HTML> Thu, 08 Nov 2012 19:26:18 GMT https://community.nxp.com/t5/Kinetis-Microcontrollers/PK70FN1M0VMJ12-Memory-controller/m-p/160152#M584 apanecatl 2012-11-08T19:26:18Z