topic Re: MK20DX256VLH7 Crystal Question in Kinetis Microcontrollers

MK20DX256VLH7 Crystal Question

loren040 — Wed, 27 May 2020 12:03:13 GMT

From what I have read in the reference manual I do not see a method to employ an external oscillator in place of the external crystal (not the 32.768 kHz clock crystal).

If it is possible, would an external oscillator not be more robust than a crystal for harsh EMI susceptibility environments?

Re: MK20DX256VLH7 Crystal Question

nxf63973 — Wed, 27 May 2020 20:40:31 GMT

Hi Marv De Beque

The MCU MK20DX256VLH7 can employ an external reference clock as a clock source. The MCU enters in External Clock Mode when the oscillator (OSC) is enabled and the external reference clock selection bit (EREFS0) is cleared. The external reference clock selection bit is located in the MCG Control 2 Register (MCG_C2) of the MCG module.

To connect the external clock, please see the topic External Clock Connections of the Chapter 25 Oscillator (OSC) of the K20 Sub-Family Reference Manual.

Please let me know if you need any more information.

Re: MK20DX256VLH7 Crystal Question

nxf63973 — Fri, 29 May 2020 21:31:49 GMT

Thanks for the quick response!

The MK20DX256VLH7 does indeed run at 96 MHz (at least unofficially) in an over-clocked mode and does so reliably according to Paul Stoffregen at PJRC (Teensy 3.2 boards).

Nevertheless, it looks like that bit (EREFS0) is currently set high and using an external 16 MHz crystal. To convert to a 16 MHz external oscillator I just clear that bit.

As for the rest of the MCG registers, they should be in the same state they are now (divide external oscillator by 4 to get 4 MHz and then set PRDIV0 to multiply by 24).

The MCG registers are as follows:

MCG_C1 0x20
MCG_C2 0x24 <== change to 0x20 for external oscillator.
MCG_C3 0x6A
MCG_C4 0x0B
MCG_C5 0x03 <== divide external oscillator by 4
MCG_C6 0x40 <== PLL selected and multiply by 24
MCG_S 0x6E Read Only
MCG_SC 0x6A
MCG_ATCVH 0x00
MCG_ATCVL 0x00
MCG_C7 0x00
MCG_C8 0x80

If I interpret the manual correctly, that should do it, right?

Thanks again!

Hi Marv De Beque,

Unfortunately, we do not support or recommend operating outside the range of frequency established for this part, which has a limit of 72MHz.

The modifications and settings needed to achieve a speed higher than that may cause the MCU to not behave as intended, and we cannot guarantee functionality outside this range.

I'm sorry for the inconvenience this may cause.

Please let me know if you need any more information.

Re: MK20DX256VLH7 Crystal Question

loren040 — Fri, 29 May 2020 22:18:01 GMT

Thank you.

Okay, I understand. My question really wasn’t about over-clocking the chip. For the sake of the original question and to get back on track, if I changed the oscillator frequency to 12 MHz, would my register values be correct to use an external oscillator with the CPU running at 72 MHz?

Thanks,

Marv

Re: MK20DX256VLH7 Crystal Question

loren040 — Fri, 29 May 2020 22:22:48 GMT

Okay, let's use a 12 MHz oscillator instead of the 16 MHz, divide by 4 and multiply by 24 = 72 MHz.

Now will my register settings work for an external oscillator?

MCG_C1 0x20
MCG_C2 0x20 <== EREFS0 cleared
MCG_C3 0x6A
MCG_C4 0x0B
MCG_C5 0x03 <== divide external oscillator by 4
MCG_C6 0x40 <== PLL selected and multiply by 24
MCG_S 0x6E Read Only
MCG_SC 0x6A
MCG_ATCVH 0x00
MCG_ATCVL 0x00
MCG_C7 0x00
MCG_C8 0x80

Re: MK20DX256VLH7 Crystal Question

nxf63973 — Mon, 01 Jun 2020 16:03:44 GMT

Hi Marv De Beque

That configuration for the MGC module will use an external clock reference and the PLL output as clock source for the System Clock. So if a 12MHz clock is connected to the MCU, the MCU system clock may run at approximately 72Mhz.

Please let me know if you need any more information.

Re: MK20DX256VLH7 Crystal Question

loren040 — Tue, 09 Jun 2020 15:14:10 GMT

Thank you. One final question, I think.

What exactly does clearing the EREFS0 (MCG_C2 External Reference Select Bit) do?

It seems to that the only thing I can tell it does is free up the unused XTAL pin so that it might be used as a GPIO pin.

The software runs whether the bit is set or cleared, as far as I can tell.

Thanks in advance.

Re: MK20DX256VLH7 Crystal Question

nxf63973 — Wed, 10 Jun 2020 18:58:57 GMT

Hi Marv De Beque

The External Reference Select bit (EREFS0) controls the OSC module. If EREFS0 is set, the crystal oscillator of the OSC module is enabled and, in conjunction with an external crystal or resonator, generates a reference clock for the MCU.

If EREFS0 is cleared, the crystal oscillator of the OSC module remains disabled and the reference clock for the MCU should be supplied by an external clock.

Please let me know if you need any more information.

Jose

Re: MK20DX256VLH7 Crystal Question

loren040 — Wed, 10 Jun 2020 19:09:07 GMT

I don't think I fully understand the the clock system in the chip.

First, when I use an external TCXO oscillator into the EXTAL input (XTAL pin is disconnected) and run the software with EREFS0 set the MCU appears to run exactly as it would if I had hooked up a crystal to to the EXTAL and XTAL. In other words, I've run the same exact software on two different boards (one with a crystal and one with a TCXO oscillator)and observe no difference in the performance.

Is that normal?

Re: MK20DX256VLH7 Crystal Question

nxf63973 — Thu, 11 Jun 2020 20:27:47 GMT

Hi Marv De Beque

Could you please provide some more information?

What is the configuration of the MCG module in the software you ran on these boards?
What is the System Clock frequency you expect with this software?
What is the System Clock frequency you obtained?
What is the frequency of the signal provided by the TCXO oscillator?
What is the frequency of the crystal?

Regards,

Jose

Re: MK20DX256VLH7 Crystal Question

loren040 — Thu, 11 Jun 2020 20:51:49 GMT

1) The MCG modules are configured as follows:

MCG_C1 0x20
MCG_C2 0x20 <== EREFS0 cleared
MCG_C3 0x-- <== Read Only
MCG_C4 0x-- <== Read Only
MCG_C5 0x03 <== divide external oscillator by 4
MCG_C6 0x40 <== PLL selected and multiply by 24
MCG_S 0x-- <== Read Only
MCG_SC 0x6A
MCG_ATCVH 0x00
MCG_ATCVL 0x00
MCG_C7 0x00
MCG_C8 0x80

2) Expected system clock = 72 MHz

3) 72 MHz (as far as I can tell)

4) TCXO = 12 MHz

5) Crystal = 12 MHz

NOTE: EREFS0 when set does not appear to adversely change operation of system(when TCXO is used). In fact, there is no apparent change at all—except that XTAL pin 33 (when TCXO is used) is low when EREFS0 = 1 and floats high when EREFS0 = 0.

FYI — We intend to use a TCXO clock source because we want better EMI susceptibility and we do not need low power operation.

Re: MK20DX256VLH7 Crystal Question

nxf63973 — Fri, 19 Jun 2020 23:55:27 GMT

Hi Marv De Beque

As I understood, you do not have issues in the performance of your board. Please let me know if I misunderstood you.

The change in the External Reference Select bit may not be visible if there is an external clock connected to EXTAL input with the same frequency expected by the crystal oscillator of the OSC module.

Please let me know if you need any more info or have any issues.

Re: MK20DX256VLH7 Crystal Question

loren040 — Sat, 20 Jun 2020 00:05:17 GMT

That may explain my observations. Migrating from a crystal to a TCXO of the same frequency did not induce any noticeable effects with the software operation.

Clearing the bit from within the program during initialization did cause problems if done too early, it seems. I was able to successfully clear the EREFS0 bit only after starting the software with it first set. I am not sure why that is, but I have other fires burning that have taken me away from the problem and for now I am satisfied that the software works reliably when I clear EREFS0 at the end of the initialization process.

Re: MK20DX256VLH7 Crystal Question

nxf63973 — Wed, 24 Jun 2020 20:04:32 GMT

Hi Marv De Beque

Good to hear that works fine.

Please tell me If you need anything else.