Kinetis Microcontrollers中的主题 Re: ETB access within the processor

ETB access within the processor

leguan1 — Sun, 02 Feb 2020 19:05:01 GMT

Hi,

I am writing a program to read the ETB memory from a task on a frdm-k64f board. I can achieve this by using the AHB interface to read the ETB data registers indirectly. However, it seems to be inefficient because I can only access 1 word once. Based on the ARM ETB manual (ARM Information Center ), the ETB trace RAM is also aliased directly into the system memory space. The base addresses of the ETB registers and the trace RAM are defined by the AHB decoder. While I can find the base address of the ETB registers easily, I cannot find the base address of the trace RAM. I searched both the ARM documents and the K64 Sub-Family Reference Manual.

Any clue is appreciated!

Thanks!

Re: ETB access within the processor

diego_charles — Tue, 04 Feb 2020 23:17:13 GMT

Hello, Leguan

I´m currently working to provide you an answer, as soon I get useful information I' let you know.
Have a great day,
Diego

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Re: ETB access within the processor

leguan1 — Thu, 06 Feb 2020 23:39:34 GMT

Thanks in advance, Diego!

I need to clarify that it turns out the even through ETB registers, I cannot read the ETB RAM. Actually, I can only access a limited number of ETB registers. After checking the manual, BIT 2 of ETB control registers controls whether access via AHB is allowed. It is 0 which only allows JATG access.

Moreover, I found that the NXP ETB is not fully consistent with the ARM document. For example, the RAM width register is 0 while it should be

b100000 or b011000. Can you point me to the appropriate document to get more details of NXP ETB implementation?

Thanks!

Re: ETB access within the processor

diego_charles — Tue, 11 Feb 2020 22:07:42 GMT

Hello Leguan,

Sorry for my late response.

Currently, there are no software examples and low-level implementations that I could provide you that match your application.

Besides the reference manual, by this point, I´m not sure if you are aware of the NXP´s MCUxpresso guide offers MCUXpresso IDE Instruction Trace Guide.

Chapter 3.3 Embedded Trace Buffer (ETB) provides more details in the ETB, including techniques to configure the buffer, but not for a specific MCU.

I have to mention that the read of the trace data from the ETB is made trough a LinkServer connection I (including many other CMSIS-DAP probes, OpenSDA circuits) during a debug session in MCUXpresso, which

differs from reading the ETB during a task.

About the differences that you notice among the ARM documentation, you are right, since the implementation of ETM and ETB is vendor-specific.

Best regards, Diego.

Re: ETB access within the processor

leguan1 — Tue, 11 Feb 2020 22:37:58 GMT

Hi Diego,

Thanks for the response. I know the MCUXpresso IDE Instruction Trace Guide and it works perfectly with the hardware debugger. It seems there is no way to read the buffer directly from inside the target.

Best!

Re: ETB access within the processor

diego_charles — Wed, 12 Feb 2020 20:55:22 GMT

Hello, Leguan

If I could help in something else, please let me know,

Best regards, Diego.