KV46 FlexCAN Individual Mailbox Masking

bitjockey — Fri, 31 Jan 2020 15:02:01 GMT

Hello,

I have been using the KV46 on a design and I can't seem to get individual masking working for both CAN0 & CAN1. When I write those bits I enter/exit freeze mode. I set the global CAN filter to 0. When I send the CAN messages that the system will see They always received into MB 0. The only way I can get them to be received into individual mailboxes based on ID is to clear the individual IRMQ bit in the MCR and set the global mask to 0x3FFFFFFF. Is there something else that needs to be done to enable individual mailbox Mask IDs?

Best Regards

Re: KV46 FlexCAN Individual Mailbox Masking

Alexis_A — Mon, 02 Nov 2020 14:36:17 GMT

Hello Brian,

You also need to enable the MCR.IRMQ bit to enable the Individual Mask.

In the SDK, the example flexcan_loopback, the FLEXCAN_GetDefaultConfig saves the configuration values in the structure, you need to change it to flexcanConfig.enableIndividMask = true and after that call the next API:

FLEXCAN_SetRxIndividualMask(CAN_Type *base, uint8_t maskIdx, uint32_t mask)‍

I hope this helps you.

Best Regards,

Alexis Andalon

topic KV46 FlexCAN Individual Mailbox Masking in Kinetis Microcontrollers

KV46 FlexCAN Individual Mailbox Masking

Re: KV46 FlexCAN Individual Mailbox Masking