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    <title>Kinetis MicrocontrollersのトピックRe: KL17Z32VLH4 : SRAM location in memory map</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027456#M56394</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have modified my linker file as follow and my microcontroller stop to crash.&lt;/P&gt;&lt;P&gt;If I underdstand well, stack area is from 0x1FFFF_FE00 to 0x2000_0000.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Am I right?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Highest address of the user mode stack */&lt;BR /&gt;_estack = 0x20000000;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* end of m_data */&lt;BR /&gt;__SP_INIT = _estack;&lt;BR /&gt;__stack = _estack;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Generate a link error if heap and stack don't fit into RAM */&lt;BR /&gt;__heap_size = 0x100;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* required amount of heap&amp;nbsp; */&lt;BR /&gt;__stack_size = 0x0200;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* required amount of stack */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Specify the memory areas */&lt;BR /&gt;MEMORY&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; m_interrupts&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RX)&amp;nbsp; : ORIGIN = 0x00000000, LENGTH = 0x00000100&lt;BR /&gt;&amp;nbsp; m_cfmprotrom&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RX)&amp;nbsp; : ORIGIN = 0x00000400, LENGTH = 0x00000010&lt;BR /&gt;&amp;nbsp; m_header&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RX)&amp;nbsp; : ORIGIN = 0x00000410, LENGTH = 0x00000050&lt;BR /&gt;&amp;nbsp; m_text&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RX)&amp;nbsp; : ORIGIN = 0x00000460, LENGTH = 0x00007BA0&lt;BR /&gt;&amp;nbsp; m_data&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RW)&amp;nbsp; : ORIGIN = 0x1FFFF800, LENGTH = 2K&lt;BR /&gt;&amp;nbsp; m_data_0x20000000&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RW)&amp;nbsp; : ORIGIN = 0x20000000, LENGTH = 6K&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* User_heap_stack section, used to check that there is enough RAM left */&lt;BR /&gt;&amp;nbsp; ._user_heap_stack :&lt;BR /&gt;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; . = ALIGN(4);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; PROVIDE ( end = . );&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; PROVIDE ( _end = . );&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; PROVIDE ( __end__ = . );&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; __heap_addr = .;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; __HeapBase = .;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; . = . + __heap_size;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; __HeapLimit = .;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; . = . + __stack_size;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; . = ALIGN(4);&lt;BR /&gt;&amp;nbsp; } &amp;gt; m_data&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 19 Mar 2020 17:07:01 GMT</pubDate>
    <dc:creator>loblick</dc:creator>
    <dc:date>2020-03-19T17:07:01Z</dc:date>
    <item>
      <title>KL17Z32VLH4 : SRAM location in memory map</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027452#M56390</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm working with a KL17Z32VLH4 and I have some trouble like unexpected reset.&lt;/P&gt;&lt;P&gt;I supposed that was a stack issue and I began to check memory map and stack amount.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I see something curious in the linker file with m_data area :&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; m_data&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RW)&amp;nbsp; : ORIGIN = 0x1FFFF800, LENGTH = 0x00002000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1/ SRAM_L and SRAM_U are not splitted in m_data&lt;/P&gt;&lt;P&gt;2/ m_data begin at 0x1FFFF800&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Moreover, the KL17P64M48SF2 datasheet which apply to my Kinetis says that :&lt;/P&gt;&lt;P&gt;- SRAM_L area is 0x1FFF_F000 to 0x1FFF_FFFF&lt;/P&gt;&lt;P&gt;- SRAM_H area is 0x2000_0000 to 0x2000_2FFF&lt;/P&gt;&lt;P&gt;- KL17Z32VLH4 had 8K SRAM (0x2000)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thus, I think that m_data should be in SRAM_L area and I have to correct linker file like this :&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; m_data&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RW)&amp;nbsp; : ORIGIN = 0x1FFFF000, LENGTH = 0x00001000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does anybody confirm I'm right?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you very much.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Feb 2020 21:44:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027452#M56390</guid>
      <dc:creator>loblick</dc:creator>
      <dc:date>2020-02-27T21:44:18Z</dc:date>
    </item>
    <item>
      <title>Re: KL17Z32VLH4 : SRAM location in memory map</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027453#M56391</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Valid address ranges for SRAM_L and SRAM_U are then defined as:&lt;BR /&gt;• SRAM_L = [0x2000_0000–(SRAM_size/4)] to 0x1FFF_FFFF&lt;BR /&gt;• SRAM_U = 0x2000_0000 to [0x2000_0000+(SRAM_size*(3/4))-1]&lt;BR /&gt;SRAM_L = (0x20000000-0x2000/4)&amp;nbsp; ~ 0x1fffffff =&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x1FFFF800~&lt;SPAN style="color: #3d3d3d;"&gt;0x1fffffff&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;So you do not need modify.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;------------------------------------------------------------------------------- &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Feb 2020 02:14:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027453#M56391</guid>
      <dc:creator>nxf56274</dc:creator>
      <dc:date>2020-02-28T02:14:55Z</dc:date>
    </item>
    <item>
      <title>Re: KL17Z32VLH4 : SRAM location in memory map</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027454#M56392</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your quick ansewer. Obviously, I was wrong.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I had others questions : what about stack pointer? Could be located absolutely in lower RAM? Or could it be in upper RAM?&lt;/P&gt;&lt;P&gt;if so, what happen when stack area was located around 0x2000_0000? Does it could crash ARM core sometime when data are missaligned (id. if a 32 bits value is located from 0x1FFFF_FFFE to 0x2000_0001?)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day too.&lt;/P&gt;&lt;P&gt;Loïc&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Feb 2020 05:37:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027454#M56392</guid>
      <dc:creator>loblick</dc:creator>
      <dc:date>2020-02-28T05:37:51Z</dc:date>
    </item>
    <item>
      <title>Re: KL17Z32VLH4 : SRAM location in memory map</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027455#M56393</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Hi,&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;The top stack pointer address is 0x2003_0000. The size of stack is 0x400. So the stack ranges from (0x2003_0000-0x400)&amp;nbsp; to 0x2003_0000. The stack poniter should be in the range.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Mar 2020 01:29:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027455#M56393</guid>
      <dc:creator>nxf56274</dc:creator>
      <dc:date>2020-03-02T01:29:11Z</dc:date>
    </item>
    <item>
      <title>Re: KL17Z32VLH4 : SRAM location in memory map</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027456#M56394</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have modified my linker file as follow and my microcontroller stop to crash.&lt;/P&gt;&lt;P&gt;If I underdstand well, stack area is from 0x1FFFF_FE00 to 0x2000_0000.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Am I right?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Highest address of the user mode stack */&lt;BR /&gt;_estack = 0x20000000;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* end of m_data */&lt;BR /&gt;__SP_INIT = _estack;&lt;BR /&gt;__stack = _estack;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Generate a link error if heap and stack don't fit into RAM */&lt;BR /&gt;__heap_size = 0x100;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* required amount of heap&amp;nbsp; */&lt;BR /&gt;__stack_size = 0x0200;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* required amount of stack */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Specify the memory areas */&lt;BR /&gt;MEMORY&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; m_interrupts&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RX)&amp;nbsp; : ORIGIN = 0x00000000, LENGTH = 0x00000100&lt;BR /&gt;&amp;nbsp; m_cfmprotrom&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RX)&amp;nbsp; : ORIGIN = 0x00000400, LENGTH = 0x00000010&lt;BR /&gt;&amp;nbsp; m_header&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RX)&amp;nbsp; : ORIGIN = 0x00000410, LENGTH = 0x00000050&lt;BR /&gt;&amp;nbsp; m_text&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RX)&amp;nbsp; : ORIGIN = 0x00000460, LENGTH = 0x00007BA0&lt;BR /&gt;&amp;nbsp; m_data&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RW)&amp;nbsp; : ORIGIN = 0x1FFFF800, LENGTH = 2K&lt;BR /&gt;&amp;nbsp; m_data_0x20000000&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (RW)&amp;nbsp; : ORIGIN = 0x20000000, LENGTH = 6K&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* User_heap_stack section, used to check that there is enough RAM left */&lt;BR /&gt;&amp;nbsp; ._user_heap_stack :&lt;BR /&gt;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; . = ALIGN(4);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; PROVIDE ( end = . );&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; PROVIDE ( _end = . );&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; PROVIDE ( __end__ = . );&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; __heap_addr = .;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; __HeapBase = .;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; . = . + __heap_size;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; __HeapLimit = .;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; . = . + __stack_size;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; . = ALIGN(4);&lt;BR /&gt;&amp;nbsp; } &amp;gt; m_data&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 19 Mar 2020 17:07:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL17Z32VLH4-SRAM-location-in-memory-map/m-p/1027456#M56394</guid>
      <dc:creator>loblick</dc:creator>
      <dc:date>2020-03-19T17:07:01Z</dc:date>
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