<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: FlexNVM Dflash Read issue on K64FX512 in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/FlexNVM-Dflash-Read-issue-on-K64FX512/m-p/1024080#M56326</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/nxf54944"&gt;nxf54944&lt;/A&gt;‌,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm having a very similar problem with the MKE18F512 (on the TWR-KE18F eval board):&lt;/P&gt;&lt;P&gt;I've loaded and run the DFlash example from the SDK 2.7.0 (boards\twrke18f\driver_examples\flash\flexnvm_dflash) and all&amp;nbsp;&lt;EM&gt;appears&lt;/EM&gt; to run well. But this is only because the data being written to the FlexNVM area is not changing.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When I change the data, the erase, erase-verify, program and program-verify are all successful, but the &lt;EM&gt;direct&lt;/EM&gt; read-back fails. When I read back the data directly from the FlexNVM area, the data still has the old values. But when I reset the processor, the new values are actually there!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As you suggested, I have left a huge delay between the writing and the reading (2000 ms), but this makes no difference.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Am I missing a command or function to 'reload' the FlexNVM area with the new data??&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 21 May 2020 09:39:58 GMT</pubDate>
    <dc:creator>ichal67</dc:creator>
    <dc:date>2020-05-21T09:39:58Z</dc:date>
    <item>
      <title>FlexNVM Dflash Read issue on K64FX512</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/FlexNVM-Dflash-Read-issue-on-K64FX512/m-p/1024078#M56324</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;K64FX family includes a FLEXNVM and FLEXRAM.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I tried to write and read the FLEXNVM flash, I assessed and programmed&amp;nbsp; the piece of space of flash,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Before program it, I erase&amp;nbsp; a section space and assign it from address 0x1001f00 to 0x10020000.&lt;/P&gt;&lt;P&gt;Writing data values are 1, 2, 3,..., 32 and data size is 32 into flash.&amp;nbsp;&lt;/P&gt;&lt;P&gt;It should be address 0x1001f00 is 0x01, 0x1001f001 is 0x02,.., 0x&lt;SPAN&gt;1001f07c is 0x1f.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I read the flash directly and code is show below,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;destAdrss&amp;nbsp; =&amp;nbsp;0x1001f00&amp;nbsp;;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;/* Verify programming by reading back from flash directly*/&lt;BR /&gt; for (uint32_t i = 0; i &amp;lt; 32; i++)&lt;BR /&gt; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; s_buffer_rbc = *(volatile uint32_t *)(destAdrss + i * 4);&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;PRINTF("addr: %x, s_buffer_rb: %x, s_buffer: %x\r\n", (destAdrss + i * 4), s_buffer_rbc, s_buffer[i]);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately, I get wrong reading back ..... The top 8 bytes is correct, after&amp;nbsp; 8rd is wrong and the value is 0x&lt;SPAN&gt;ffffffff.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;What is the wrong&amp;nbsp;in my code?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;************************************************&lt;BR /&gt;---- PROGRAM STARTing ----&lt;BR /&gt;************************************************&lt;BR /&gt;FLEXNVM Example Start &lt;BR /&gt;FlexNMV DFlash Information: &lt;BR /&gt;FLEXNVM DflashBlock Base Address: 0x10000000&lt;BR /&gt;FLEXNVM Dflash Size: 128 KB (0x20000)&lt;/P&gt;&lt;P&gt;nFLEXNVM Dflash Sector Size: 4 KB (0x1000)&lt;BR /&gt;Flash is UNSECURE!&lt;BR /&gt;Erase a sector from address: (0x1001f000)&lt;BR /&gt;Successfully Erased Sector 0x1001f000 -&amp;gt; 0x10020000&lt;BR /&gt;Program a buffer to a sector of flash&lt;BR /&gt;addr: 1001f000, s_buffer_rb: 0, s_buffer: 0&lt;BR /&gt;addr: 1001f004, s_buffer_rb: 1, s_buffer: 1&lt;BR /&gt;addr: 1001f008, s_buffer_rb: 2, s_buffer: 2&lt;BR /&gt;addr: 1001f00c, s_buffer_rb: 3, s_buffer: 3&lt;BR /&gt;addr: 1001f010, s_buffer_rb: 4, s_buffer: 4&lt;BR /&gt;addr: 1001f014, s_buffer_rb: 5, s_buffer: 5&lt;BR /&gt;addr: 1001f018, s_buffer_rb: 6, s_buffer: 6&lt;BR /&gt;addr: 1001f01c, s_buffer_rb: 7, s_buffer: 7&lt;BR /&gt;addr: 1001f020, s_buffer_rb: ffffffff, s_buffer: 8&lt;BR /&gt;addr: 1001f024, s_buffer_rb: ffffffff, s_buffer: 9&lt;BR /&gt;addr: 1001f028, s_buffer_rb: ffffffff, s_buffer: a&lt;BR /&gt;addr: 1001f02c, s_buffer_rb: ffffffff, s_buffer: b&lt;BR /&gt;addr: 1001f030, s_buffer_rb: ffffffff, s_buffer: c&lt;BR /&gt;addr: 1001f034, s_buffer_rb: ffffffff, s_buffer: d&lt;BR /&gt;addr: 1001f038, s_buffer_rb: ffffffff, s_buffer: e&lt;BR /&gt;addr: 1001f03c, s_buffer_rb: ffffffff, s_buffer: f&lt;BR /&gt;addr: 1001f040, s_buffer_rb: ffffffff, s_buffer: 10&lt;BR /&gt;addr: 1001f044, s_buffer_rb: ffffffff, s_buffer: 11&lt;BR /&gt;addr: 1001f048, s_buffer_rb: ffffffff, s_buffer: 12&lt;BR /&gt;addr: 1001f04c, s_buffer_rb: ffffffff, s_buffer: 13&lt;BR /&gt;addr: 1001f050, s_buffer_rb: ffffffff, s_buffer: 14&lt;BR /&gt;addr: 1001f054, s_buffer_rb: ffffffff, s_buffer: 15&lt;BR /&gt;addr: 1001f058, s_buffer_rb: ffffffff, s_buffer: 16&lt;BR /&gt;addr: 1001f05c, s_buffer_rb: ffffffff, s_buffer: 17&lt;BR /&gt;addr: 1001f060, s_buffer_rb: ffffffff, s_buffer: 18&lt;BR /&gt;addr: 1001f064, s_buffer_rb: ffffffff, s_buffer: 19&lt;BR /&gt;addr: 1001f068, s_buffer_rb: ffffffff, s_buffer: 1a&lt;BR /&gt;addr: 1001f06c, s_buffer_rb: ffffffff, s_buffer: 1b&lt;BR /&gt;addr: 1001f070, s_buffer_rb: ffffffff, s_buffer: 1c&lt;BR /&gt;addr: 1001f074, s_buffer_rb: ffffffff, s_buffer: 1d&lt;BR /&gt;addr: 1001f078, s_buffer_rb: ffffffff, s_buffer: 1e&lt;BR /&gt;addr: 1001f07c, s_buffer_rb: ffffffff, s_buffer: 1f&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 26 Mar 2020 17:10:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/FlexNVM-Dflash-Read-issue-on-K64FX512/m-p/1024078#M56324</guid>
      <dc:creator>chhsu0229</dc:creator>
      <dc:date>2020-03-26T17:10:40Z</dc:date>
    </item>
    <item>
      <title>Re: FlexNVM Dflash Read issue on K64FX512</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/FlexNVM-Dflash-Read-issue-on-K64FX512/m-p/1024079#M56325</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;A _jive_internal="true" class="" data-content-finding="Community" data-userid="343830" data-username="chhsu0229@gmail.com" href="https://community.nxp.com/people/chhsu0229@gmail.com"&gt;Andy Hsu&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The core, crossbar switch, and bus masters can be clocked at a higher frequency than the flash clock, in order to read a correct value in the memory, some delays are needed.&lt;/P&gt;&lt;P&gt;I suggest you put a considerable delay between the writing and the reading. Please let me know your findings after putting the delay.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If you have more questions do not hesitate to ask me.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Omar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Apr 2020 18:41:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/FlexNVM-Dflash-Read-issue-on-K64FX512/m-p/1024079#M56325</guid>
      <dc:creator>Omar_Anguiano</dc:creator>
      <dc:date>2020-04-01T18:41:45Z</dc:date>
    </item>
    <item>
      <title>Re: FlexNVM Dflash Read issue on K64FX512</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/FlexNVM-Dflash-Read-issue-on-K64FX512/m-p/1024080#M56326</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/nxf54944"&gt;nxf54944&lt;/A&gt;‌,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm having a very similar problem with the MKE18F512 (on the TWR-KE18F eval board):&lt;/P&gt;&lt;P&gt;I've loaded and run the DFlash example from the SDK 2.7.0 (boards\twrke18f\driver_examples\flash\flexnvm_dflash) and all&amp;nbsp;&lt;EM&gt;appears&lt;/EM&gt; to run well. But this is only because the data being written to the FlexNVM area is not changing.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When I change the data, the erase, erase-verify, program and program-verify are all successful, but the &lt;EM&gt;direct&lt;/EM&gt; read-back fails. When I read back the data directly from the FlexNVM area, the data still has the old values. But when I reset the processor, the new values are actually there!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As you suggested, I have left a huge delay between the writing and the reading (2000 ms), but this makes no difference.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Am I missing a command or function to 'reload' the FlexNVM area with the new data??&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 21 May 2020 09:39:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/FlexNVM-Dflash-Read-issue-on-K64FX512/m-p/1024080#M56326</guid>
      <dc:creator>ichal67</dc:creator>
      <dc:date>2020-05-21T09:39:58Z</dc:date>
    </item>
    <item>
      <title>Re: FlexNVM Dflash Read issue on K64FX512</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/FlexNVM-Dflash-Read-issue-on-K64FX512/m-p/1024081#M56327</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;OK, so it looks like I've got to the bottom of this one.&lt;/P&gt;&lt;P&gt;The micro that I'm using (&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;MKE18F512) has L1 cache enabled by default for the FlexNVM. So when reading after a write, the results were from the cache and not from the FlexNVM itself.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;There are (at least) 2 ways to get the 'real' data after a write:&lt;/SPAN&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Disable the cache: I found this needed to be done for both the FlexNVM&amp;nbsp;&lt;EM&gt;and&lt;/EM&gt; Program flash, using the&amp;nbsp;LMEM-&amp;gt;PCCRMR register. This may, of course, have a performance impact on the application.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f; "&gt;Call the &lt;EM&gt;L1CACHE_CleanInvalidateDCacheByRange&lt;/EM&gt; function to force a read of the FlexNVM area rather than the cache.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f; "&gt;Both of these methods worked for me.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f; "&gt;I don't know if this is the case with your micro, &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/chhsu0229@gmail.com"&gt;chhsu0229@gmail.com&lt;/A&gt;‌, but I hope this helps.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 May 2020 07:45:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/FlexNVM-Dflash-Read-issue-on-K64FX512/m-p/1024081#M56327</guid>
      <dc:creator>ichal67</dc:creator>
      <dc:date>2020-05-26T07:45:21Z</dc:date>
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  </channel>
</rss>

