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    <title>Kinetis MicrocontrollersのトピックK64 ethernet fails in 144pin device</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K64-ethernet-fails-in-144pin-device/m-p/989216#M55610</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;back in 2017 I had posted a tcpecho project using FRDM64F with SDK1.3 , Processor expert and FreeRTOS.&amp;nbsp;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;The original post is at&amp;nbsp;&lt;A href="https://community.nxp.com/thread/444490"&gt;Problem with Tcp_echo and PE&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;Recently I have a hardware design with the same K64F chip but in the 144pin LQFP package.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;I have tried to use the tcpecho, with only a few pin number modifications, to validate the hardware.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;It does not work even though all signals tied to the KSZ8081RNA&amp;nbsp; PHY match those on the FRDM64F and the reset is&amp;nbsp; the same 100msec time constant ramp.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;The 50Mhz clock from the 8081 is tied to pin 72.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;The only difference I see is that the FRDM&amp;nbsp; pin MDIO stays high after reset, whereas the 144pin design shows the MDIO briefly active after reset.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;Has anyone seen this type of behavior? I am attaching both projects with much appreciation for any advice.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 31 Oct 2019 21:11:30 GMT</pubDate>
    <dc:creator>petertsipouras</dc:creator>
    <dc:date>2019-10-31T21:11:30Z</dc:date>
    <item>
      <title>K64 ethernet fails in 144pin device</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K64-ethernet-fails-in-144pin-device/m-p/989216#M55610</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;back in 2017 I had posted a tcpecho project using FRDM64F with SDK1.3 , Processor expert and FreeRTOS.&amp;nbsp;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;The original post is at&amp;nbsp;&lt;A href="https://community.nxp.com/thread/444490"&gt;Problem with Tcp_echo and PE&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;Recently I have a hardware design with the same K64F chip but in the 144pin LQFP package.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;I have tried to use the tcpecho, with only a few pin number modifications, to validate the hardware.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;It does not work even though all signals tied to the KSZ8081RNA&amp;nbsp; PHY match those on the FRDM64F and the reset is&amp;nbsp; the same 100msec time constant ramp.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;The 50Mhz clock from the 8081 is tied to pin 72.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;The only difference I see is that the FRDM&amp;nbsp; pin MDIO stays high after reset, whereas the 144pin design shows the MDIO briefly active after reset.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;Has anyone seen this type of behavior? I am attaching both projects with much appreciation for any advice.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 31 Oct 2019 21:11:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K64-ethernet-fails-in-144pin-device/m-p/989216#M55610</guid>
      <dc:creator>petertsipouras</dc:creator>
      <dc:date>2019-10-31T21:11:30Z</dc:date>
    </item>
    <item>
      <title>Re: K64 ethernet fails in 144pin device</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K64-ethernet-fails-in-144pin-device/m-p/989217#M55611</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;My name is Sabina and I'll be happy to help you find the root cause of this issue. Unfortunately I do not have a 144 pin K64 so I will not be able to test this with you. If you could please share your schematic I would appreciate it so I can verify the connections and check it with detail. Also could you please confirm the version of the SDK you are currently using with the 144 pin package.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;Sabina&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 05 Nov 2019 16:17:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K64-ethernet-fails-in-144pin-device/m-p/989217#M55611</guid>
      <dc:creator>Sabina_Bruce</dc:creator>
      <dc:date>2019-11-05T16:17:35Z</dc:date>
    </item>
    <item>
      <title>Re: K64 ethernet fails in 144pin device</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K64-ethernet-fails-in-144pin-device/m-p/989218#M55612</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sabina&lt;/P&gt;&lt;P&gt;Sorry for the delay, but I accidentally found the cause. It was simply a short to GND if the negative transmit output line. Its trace was very close to a ground pad and not visible because it was underneath the Magjack. Now the echo works fine :&amp;gt;)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Pete&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Nov 2019 22:46:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K64-ethernet-fails-in-144pin-device/m-p/989218#M55612</guid>
      <dc:creator>petertsipouras</dc:creator>
      <dc:date>2019-11-26T22:46:55Z</dc:date>
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