Kinetis MicrocontrollersのトピックRe: K82 : GPIO lines active and passive filters

K82 : GPIO lines active and passive filters

EugeneHiihtaja — Wed, 09 Jan 2019 09:52:22 GMT

Hello !

Could you explain about GPIO lines passive and digital filters.

Can the same pin have enabled passive and digital filter at the same time ?

Or really it dosn't have sense ?

I can see in RM like this :

"The filter width in clock size is the same for all enabled digital filters within one port and
must be changed only when all digital filters for that port are disabled.

Does it means that different gpio lines in one port can't have different digital pin configurations ?

It can be enabled/disabled but id enabled it is the same for all port's pins.

Regards,

Eugene

Re: K82 : GPIO lines active and passive filters

Robin_Shen — Thu, 24 Jan 2019 02:33:25 GMT

Hi Eugene,

Passive filter is a analog low pass filter (10 MHz to 30 MHz bandwidth).
Passive filter deals with analog signals and using to filter high frequency noise, the frequency more than 30MHz signal will be filtered.
Passive filter frequency is fixed and could not be modified.

Digital filter deals with digital input signals. Digital filter sets a filter gate (filter width in clock size), if input signal shorter than setting filter width, the input signal will be filtered.
The digital filter gate could be set by filter registers.

Best Regards,

Robin

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Re: K82 : GPIO lines active and passive filters

EugeneHiihtaja — Thu, 24 Jan 2019 12:04:54 GMT

Hi Robin !

So If clock filter from LPO and some GPIO should detect ( and LLWU wakeup as well) LowState > 50 ms ( filterWidth = 50 ) I can use it ?

One port can have one filter but each pin can be enabled to have this filter individually ?

Or this filter is more to filter falling and rising edges and can't be used for levels ?

Regards,

Eugene