topic Programming K61using JTAG STAPL/SVF Format in Kinetis Microcontrollers

Programming K61using JTAG STAPL/SVF Format

kaiser_jochen — Tue, 12 Feb 2019 09:48:37 GMT

Hi everyone,

I want to program the K61 internal memory without relying on other programmers like cyclone max, for automated programming during production tests.

Is there an official NXP tool to convert the binary files I have to standard JTAG Files (STAPL/SVF)?

They also come with 2 address offsets for the internal flash (BIOS/Application) which have to be considered when converting the binary.

Regards,

Jochen

Re: Programming K61using JTAG STAPL/SVF Format

miduo — Fri, 15 Feb 2019 08:03:32 GMT

Hello,

Well, NXP does not provide tool that convert binary files to STAPL or SVF.

I am really do not understand why customer need do like that, actually it is no meaning. Anyway, please make reference from below post on what we can do for this purpose:

Using Eclipse to Program Binary Files to an Embedded Target | MCU on Eclipse

Re: Programming K61using JTAG STAPL/SVF Format

kaiser_jochen — Fri, 15 Feb 2019 09:55:48 GMT

Hi Fang Li,

the reason behind is that you don't have to use additional programmers for each product or device your are manufacturing/testing.

We use the official JTAG Controller from (www.jtag.com). Even the NXP files were checked with their tools for their provided BSDL files. So why not supporting programming as well?

-- Device: K61 120MHz and 150MHz in 144BGA package
-- Package Type: K61_256BGA_17x17
--

-- This BSDL has been validated for syntax and semantics compliance to
-- IEEE 1149.1 using the JTAG Technologies CHKBSDL version 1.0.2.4.

There are so many different Microcontrollers/CPU/FPGA/CPLD etc. Imagine you use a test station where you have to put 15 USB Programmers inside and install 15 different Tools to program your stuff.

Some of them can't be automated due to missing CLI support, so you still have to click buttons.

Altera(Intel)/Microsemi or Xilinx/Lattice programming tools always provide functions to convert their files in the equivalent standardized SVF/JEDEC/STAPL format.

Regards

Jochen

Re: Programming K61using JTAG STAPL/SVF Format

miduo — Mon, 18 Feb 2019 07:45:28 GMT

Hello,

Ok, understood. I will check internally and let you know if any feedback got.

Re: Programming K61using JTAG STAPL/SVF Format

miduo — Tue, 19 Feb 2019 04:16:23 GMT

Hello, Jochen

I double confirmed that

" NXP don't have tools for making that conversion. It is a bit more complicated than you realize. In order to program the flash, you need a flash algorithm. The way the debuggers/cyclone max handle it is they download a flash programming algorithm to the on-chip RAM, then pass it addresses and data for programming while controlling its execution via the debugger.

So you need full run-control of the processor, not just scan chain capability, and the flash programming algorithm needs to be implemented."

Best Regards,

Fang