K66 Teensy 3.6 ADC Simultaneous Data Read Process

foody — Fri, 26 Oct 2018 20:13:48 GMT

I am currently using a Teensy 3.6 with a K66 processor to use the two ADC's.

Is there a way to configure ADC0 and ADC1 to record data simultaneously via some library or by writing directly to the K66's registers (ADCx_CFG1 , ADCx_SC2)? I am new to the K66 processor, so forgive me for my naivete. Thanks.

Re: K66 Teensy 3.6 ADC Simultaneous Data Read Process

miduo — Mon, 29 Oct 2018 08:20:24 GMT

Hello,

Yes, the K66 has two ADC modules:ADC0 and ADC1, each ADC supports ping-pong mode, so two ADC modules can sample 4 channels. You can set the ADC in hardware triggering mode, you can use PDB to generate triggering signal to trigger ADC, the PDB CH0 is used to trigger ADC0, PDB CH1 is used to trigger ADC1. For more detail, you may take a look at the K66 reference manual.

https://www.nxp.com/docs/en/reference-manual/K66P144M180SF5RMV2.pdf

Also we had a useful application note "Using DMA to Emulate ADC Flexible Scan Mode on Kinetis K Series" which is more helpful for your issue:

https://www.nxp.com/docs/en/application-note/AN4590.pdf

topic Re: K66 Teensy 3.6 ADC Simultaneous Data Read Process in Kinetis Microcontrollers

K66 Teensy 3.6 ADC Simultaneous Data Read Process

Re: K66 Teensy 3.6 ADC Simultaneous Data Read Process