topic Re: FAST eDMA in Kinetis Microcontrollers

FAST eDMA

patricio — Thu, 04 Oct 2018 11:36:30 GMT

Hi all,

I am working with a TWR-K64 board and Kinetis KDS v3.2.0 with Processor Expert (no SDK).

After quite a lot of struggle time I succeeded making DMA work, but unfortunately not as fast as I need. This is the example project I developed to work with:

Every time the tact-switch SW3 from TWR-K64 board is pressed, a PWM signal is generated in PTD5 pin.
Every rising edge of this pin a DMA data transfer is completed, from a source array[] to a destination array[].
After 8 data transfers, the Major loop finished interrupt is executed and PWM is disabled, until SW3 is pressed again.

The example works fine when the PWM signal period is about 200ns or higher, but I need to generate a faster PWM signal. When the PWM is configured with a period of 133ns, using an oscilloscope I can see that after 8 rising egde the PWM signal is disabled. So I assume that it is working ok. However, sometimes it needs 9 pulses and some others 16 pulses to be finished. Please have a look to the scope images.

Does it mean that DMA can´t work so fast? I need the PWM to work at a period of 50ns aprox. What can I do?

I followed this post from mcuoneclipse.com to configure the board to the maximum speed.

I would appeciate your help.

Thank you in advance.

Re: FAST eDMA

mjbcswitzerland — Thu, 04 Oct 2018 13:00:37 GMT

1. What generates the PWM signal (Flex Timer?)
2 Why are there 8 DMA transfers in the major loop - are these transfers controlling HW? What is triggering the DA transfers (SW?)
3. If you are using the DMA completion interrupt you will have the interrupt response time (and interrupt priority dependencies) which would give quite high jitter (us range)
4. What are the effects of mechanical bouncing on the switch?

To get accurate timing (<us) you will need control the HW directly via DMA and avoid interrupt routines being involved.

Regards

Mark

Kinetis: http://www.utasker.com/kinetis.html
Kinetis K64:
- http://www.utasker.com/kinetis/FRDM-K64F.html
- http://www.utasker.com/kinetis/TWR-K64F120M.html
- http://www.utasker.com/kinetis/TEENSY_3.5.html
- http://www.utasker.com/kinetis/Hexiwear-K64F.html

For less questions and faster, cheaper developments: try uTasker for Kinetis

Re: FAST eDMA

patricio — Thu, 04 Oct 2018 14:58:24 GMT

Thank you Mark for you quick answer.

I will enumerate the answers to your comments.

1) You are right, Flex Timer generates the PWM. Any suggestion?

2.1) I configured the "Init_eDMA" componet by Processor Expert to do so. There are only 8 transfers to make the debuggind easier and make sure it works. The real project would have 4000 transfers aprox.

2.2) This transfers are controlled by the DMA hardware of the microcontroller. I configured it by Processor Expert.

2.2) I am not sure to undestand when you ask what is triggering the DMA transfers. The eDMA peripheral request is hardware request: GPIO pin PTD5 makes a request on its rising edge, that is generated by PWM.

3) OK, I see. So you mean that by the time the "Major loop finished" interrupt is executed and PWM is disabled on it, some extra PWM pulses are generated. That makes sense. However, why sometimes I see 8 pulses (target pulses) and 9 and 16 in others?

4) Mechanical bouncing is discarded. I control it by software.

I agree when you say that I need to control the HW directly via DMA and avoid interrupt routines being involved. However I see necesary to use the "Major loop finished" interrupt to be noticed that it is finished. Don´t you think so? And if not, how could I do it?

Any idea to make it work faster?

Thank you very much for your help.

Re: FAST eDMA

mjbcswitzerland — Thu, 04 Oct 2018 17:15:03 GMT

Aitor

Your interrupt response time may have jitter due to other interrupts in progress that can't be interrupted (due to higher priority).

1) See whether you can chain DMA channels so that the completion of the major loop doesn't cause an interrupt (although could also to inform the application that it has terminated) but instead causes another DMA channel transfer that immediately stops the PWM.

2) If you connect the PWM output to a clock input of another FlexTimer/PWM you can count the number of pulses generated. When the required number has been seen the timer can generate a DMA transfer that stops the PWM.

Regards

Mark

Re: FAST eDMA

patricio — Fri, 05 Oct 2018 10:09:20 GMT

Hi Mark,

At the moment I´m afraid the second option is not possible, as I am not alowed to change our hardware. But I think the first option could suit very well.

However, reading the microcontroller datasheet I am not able to find the proper register where DMA should write to disable the PWM.

I try to follow the method "PWM1_Disable()" generated by Processor Expert in order to follow the generated code to find out the mentioned register, but no way.

Any idea?

Thank you again.

BR.

Aitor.

Re: FAST eDMA

mjbcswitzerland — Fri, 05 Oct 2018 15:58:38 GMT

Aitor

If you do a DMA transfer of the value 0 to the flex timer control register it will disable the clock to the module and thus freeze it.

Regards

Mark

Re: FAST eDMA

mjbcswitzerland — Sat, 06 Oct 2018 20:20:54 GMT

Aitor

I forgot to mention that when the clock is disabled to the FlexTimer it will tri-state its outputs, which means that you can define the output pin's state by configuring a pull-up or pull-down accordingly.

Regards

Mark

Re: FAST eDMA

patricio — Mon, 08 Oct 2018 09:35:43 GMT

Hi Mark,

I will try it by a Major loop link request. I will keep you inform.

Thanks.

Aitor.

Re: FAST eDMA

patricio — Thu, 11 Oct 2018 08:19:33 GMT

Hi Mark,

I followed your advice and I succeded stopping PWM by transfering 0 to FTM0_SC through DMA. So what I see know is that PWM stops when the 8 transfers are finished. Great :smileyhappy: !!!!

However, I need the PWM to work at a period of 50ns aprox, and at this frecuency what I see is that the PWM stops after 27 pulses instead of at 8.

Does it mean that DMA can´t work so fast? Any clue to make it faster?

Thank you.

Aitor.

Re: FAST eDMA

patricio — Tue, 16 Oct 2018 08:48:20 GMT

Hi again Mark,

Looking for some information about this issue, I found the following post in the NXP Community about the maximum data rate of DMA: max DMA data rate documentation

The MK64FN1M0 runs at 120MHz core too and 60MHz bus. So if I asume a rate of 120MBytes/s for long word transfer, then each long word DMA transfer would take 7.94ns. Is this right? If so, why can´t I work below 133ns? What am I missing?

Thank you again.

Best regards.